From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 5/5] drm/i915: Enable rc6 with bdw Date: Thu, 15 May 2014 23:17:47 +0200 Message-ID: <20140515211747.GA8790@phenom.ffwll.local> References: <1400176691-5731-1-git-send-email-mika.kuoppala@intel.com> <1400176691-5731-5-git-send-email-mika.kuoppala@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ee0-f47.google.com (mail-ee0-f47.google.com [74.125.83.47]) by gabe.freedesktop.org (Postfix) with ESMTP id BDBF86E1F3 for ; Thu, 15 May 2014 14:17:51 -0700 (PDT) Received: by mail-ee0-f47.google.com with SMTP id c13so999384eek.6 for ; Thu, 15 May 2014 14:17:50 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1400176691-5731-5-git-send-email-mika.kuoppala@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Mika Kuoppala Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, May 15, 2014 at 08:58:11PM +0300, Mika Kuoppala wrote: > Everything should be in place so enable rc6/rps for bdw. > = > Reviewed-by: Ville Syrj=E4l=E4 > Signed-off-by: Mika Kuoppala Merged all 5 patches, thanks. Now that we have the prerequisites it's time to give runtime pm on bdw another shot. Can you please test a revert of commit f033579f7759bfb34c082aacbd19a830f1e587cc Author: Imre Deak Date: Mon Apr 28 12:03:59 2014 +0300 drm/i915: bdw: fix RC6 enabled status reporting and disable runtime PM and if it checks out please submit it? Thanks, Daniel > --- > drivers/gpu/drm/i915/intel_pm.c | 8 ++------ > 1 file changed, 2 insertions(+), 6 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index 36eb1ea..34b0766 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3374,10 +3374,6 @@ static int sanitize_rc6_option(const struct drm_de= vice *dev, int enable_rc6) > if (INTEL_INFO(dev)->gen =3D=3D 5 && !IS_IRONLAKE_M(dev)) > return 0; > = > - /* Disable RC6 on Broadwell for now */ > - if (IS_BROADWELL(dev)) > - return 0; > - > /* Respect the kernel parameter if it is set */ > if (enable_rc6 >=3D 0) { > int mask; > @@ -4685,7 +4681,7 @@ void intel_disable_gt_powersave(struct drm_device *= dev) > if (IS_IRONLAKE_M(dev)) { > ironlake_disable_drps(dev); > ironlake_disable_rc6(dev); > - } else if (IS_GEN6(dev) || IS_GEN7(dev)) { > + } else if (IS_GEN6(dev) || IS_GEN7(dev) || IS_BROADWELL(dev)) { > cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work); > cancel_work_sync(&dev_priv->rps.work); > mutex_lock(&dev_priv->rps.hw_lock); > @@ -4732,7 +4728,7 @@ void intel_enable_gt_powersave(struct drm_device *d= ev) > ironlake_enable_rc6(dev); > intel_init_emon(dev); > mutex_unlock(&dev->struct_mutex); > - } else if (IS_GEN6(dev) || IS_GEN7(dev)) { > + } else if (IS_GEN6(dev) || IS_GEN7(dev) || IS_BROADWELL(dev)) { > /* > * PCU communication is slow and this doesn't need to be > * done at any specific time, so do this out of our fast path > -- = > 1.7.9.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch