From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 66/66] drm/i915: runtime PM support for DPMS Date: Fri, 16 May 2014 14:48:27 -0700 Message-ID: <20140516144827.155fac84@jbarnes-desktop> References: <1398376542-27825-1-git-send-email-daniel.vetter@ffwll.ch> <1398376542-27825-67-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from gproxy3-pub.mail.unifiedlayer.com (gproxy3-pub.mail.unifiedlayer.com [69.89.30.42]) by gabe.freedesktop.org (Postfix) with SMTP id 52BD86F00C for ; Fri, 16 May 2014 14:48:36 -0700 (PDT) In-Reply-To: <1398376542-27825-67-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Thu, 24 Apr 2014 23:55:42 +0200 Daniel Vetter wrote: > + if (enable) { > + if (!intel_crtc->active) { > + domains = get_crtc_power_domains(crtc); > + for_each_power_domain(domain, domains) > + intel_display_power_get(dev_priv, domain); > + intel_crtc->enabled_power_domains = domains; > + > + dev_priv->display.crtc_enable(crtc); > + } > + } else { > + if (intel_crtc->active) { > + dev_priv->display.crtc_disable(crtc); > + > + domains = intel_crtc->enabled_power_domains; > + for_each_power_domain(domain, domains) > + intel_display_power_put(dev_priv, domain); > + intel_crtc->enabled_power_domains = 0; > + } > + } These branches could probably be cleaned up a bit. But the power domain bits here got me thinking that maybe we can push them down into the crtc_enable/disable functions instead. That would let us do the right thing per-platform and save us the "get_crtc_power_domains" call which may not make sense on all platforms. I haven't thought it through for the other power wells, but that type of approach may make more sense than trying to abstract the wells at the high level we're doing today, especially since things are likely to get finer grained over time rather than coarser. -- Jesse Barnes, Intel Open Source Technology Center