From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 3/5] drm/i915: Convert uncleared FIFO underrun message to errors Date: Fri, 16 May 2014 18:55:56 +0200 Message-ID: <20140516165556.GV8790@phenom.ffwll.local> References: <1400258425-32664-1-git-send-email-ville.syrjala@linux.intel.com> <1400258425-32664-4-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ee0-f48.google.com (mail-ee0-f48.google.com [74.125.83.48]) by gabe.freedesktop.org (Postfix) with ESMTP id 1FB176E242 for ; Fri, 16 May 2014 09:56:00 -0700 (PDT) Received: by mail-ee0-f48.google.com with SMTP id e49so1721135eek.7 for ; Fri, 16 May 2014 09:56:00 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1400258425-32664-4-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, May 16, 2014 at 07:40:23PM +0300, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > Some platforms have a shared error interrupt, so if FIFO underrun > reporting gets disabled for one pipe/transcoder it gets disabled > for all pipes/transcoders. > = > When we disable FIFO underrun reporting we check whether the > interrupt was enabled or not. If it wasn't we might have missed > an underrun and we perform one last check right there. Currently > we print a debug message when an underrun is detect using this > mechanism. Promote the message to DRM_ERROR() to match the other > underrun error messages. > = > Signed-off-by: Ville Syrj=E4l=E4 Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_irq.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_= irq.c > index fdce260..862964f 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -344,8 +344,8 @@ static void ivybridge_set_fifo_underrun_reporting(str= uct drm_device *dev, > = > if (!was_enabled && > (I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe))) { > - DRM_DEBUG_KMS("uncleared fifo underrun on pipe %c\n", > - pipe_name(pipe)); > + DRM_ERROR("uncleared fifo underrun on pipe %c\n", > + pipe_name(pipe)); > } > } > } > @@ -429,8 +429,8 @@ static void cpt_set_fifo_underrun_reporting(struct dr= m_device *dev, > = > if (!was_enabled && > (tmp & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder))) { > - DRM_DEBUG_KMS("uncleared pch fifo underrun on pch transcoder %c\n", > - transcoder_name(pch_transcoder)); > + DRM_ERROR("uncleared pch fifo underrun on pch transcoder %c\n", > + transcoder_name(pch_transcoder)); > } > } > } > -- = > 1.8.5.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch