From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/6] drm/i915: Fix ILK reset wait Date: Tue, 20 May 2014 10:01:27 +0200 Message-ID: <20140520080127.GC8790@phenom.ffwll.local> References: <1400516607-25840-1-git-send-email-ville.syrjala@linux.intel.com> <1400516607-25840-3-git-send-email-ville.syrjala@linux.intel.com> <20140519093025.49bed2b7@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ee0-f50.google.com (mail-ee0-f50.google.com [74.125.83.50]) by gabe.freedesktop.org (Postfix) with ESMTP id 44E1E6E100 for ; Tue, 20 May 2014 01:01:32 -0700 (PDT) Received: by mail-ee0-f50.google.com with SMTP id e51so249797eek.23 for ; Tue, 20 May 2014 01:01:31 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140519093025.49bed2b7@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, May 19, 2014 at 09:30:25AM -0700, Jesse Barnes wrote: > On Mon, 19 May 2014 19:23:23 +0300 > ville.syrjala@linux.intel.com wrote: > = > > From: Ville Syrj=E4l=E4 > > = > > We should be waiting for the reset bit to clear, not remain set. > > = > > Signed-off-by: Ville Syrj=E4l=E4 > > --- > > drivers/gpu/drm/i915/intel_uncore.c | 6 ++++-- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915= /intel_uncore.c > > index 0e333f2..d79db88 100644 > > --- a/drivers/gpu/drm/i915/intel_uncore.c > > +++ b/drivers/gpu/drm/i915/intel_uncore.c > > @@ -1000,7 +1000,8 @@ static int ironlake_do_reset(struct drm_device *d= ev) > > gdrst &=3D ~GRDOM_MASK; > > I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, > > gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE); > > - ret =3D wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); > > + ret =3D wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & > > + GRDOM_RESET_ENABLE) =3D=3D 0, 500); > > if (ret) > > return ret; > > = > > @@ -1008,7 +1009,8 @@ static int ironlake_do_reset(struct drm_device *d= ev) > > gdrst &=3D ~GRDOM_MASK; > > I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, > > gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE); > > - return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); > > + return wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & > > + GRDOM_RESET_ENABLE) =3D=3D 0, 500); > > } > > = > > static int gen6_do_reset(struct drm_device *dev) > = > Arg, I lost the docs on this, but it matches what I remember. > = > Reviewed-by: Jesse Barnes Was this tested on an ilk? I remember writing a similar patch and I didn't apply it due to conflict with reality. -Daniel -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch