From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Add null state batch to active list Date: Wed, 21 May 2014 15:22:55 +0300 Message-ID: <20140521122254.GQ27580@intel.com> References: <1400674131-3135-1-git-send-email-mika.kuoppala@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id D7B2D6E26E for ; Wed, 21 May 2014 05:23:23 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1400674131-3135-1-git-send-email-mika.kuoppala@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Mika Kuoppala Cc: intel-gfx@lists.freedesktop.org, miku@iki.fi List-Id: intel-gfx@lists.freedesktop.org On Wed, May 21, 2014 at 03:08:51PM +0300, Mika Kuoppala wrote: > for proper refcounting to take place as we use > i915_add_request() for it. > = > i915_add_request() also takes the context for the request > from ring->last_context so move the null state batch > submission after the ring context has been set. > = > Cc: Ville Syrj=E4l=E4 > Cc: Chris Wilson > Cc: Damien Lespiau > Signed-off-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_drv.h | 3 +++ > drivers/gpu/drm/i915/i915_gem.c | 4 ++-- > drivers/gpu/drm/i915/i915_gem_context.c | 16 ++++++++-------- > drivers/gpu/drm/i915/i915_gem_render_state.c | 7 +++++-- > 4 files changed, 18 insertions(+), 12 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index b90ec69..6881f70 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2204,6 +2204,9 @@ static inline void i915_gem_object_unpin_pages(stru= ct drm_i915_gem_object *obj) > int __must_check i915_mutex_lock_interruptible(struct drm_device *dev); > int i915_gem_object_sync(struct drm_i915_gem_object *obj, > struct intel_ring_buffer *to); > +void i915_gem_object_move_to_active(struct drm_i915_gem_object *obj, > + struct intel_ring_buffer *ring); > +void i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj); > void i915_vma_move_to_active(struct i915_vma *vma, > struct intel_ring_buffer *ring); > int i915_gem_dumb_create(struct drm_file *file_priv, > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_= gem.c > index 440979f..d795800 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -2038,7 +2038,7 @@ i915_gem_object_get_pages(struct drm_i915_gem_objec= t *obj) > return 0; > } > = > -static void > +void > i915_gem_object_move_to_active(struct drm_i915_gem_object *obj, > struct intel_ring_buffer *ring) > { > @@ -2084,7 +2084,7 @@ void i915_vma_move_to_active(struct i915_vma *vma, > return i915_gem_object_move_to_active(vma->obj, ring); > } > = > -static void > +void > i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj) > { > struct drm_i915_private *dev_priv =3D obj->base.dev->dev_private; > diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i9= 15/i915_gem_context.c > index f220c94..d3aad5b 100644 > --- a/drivers/gpu/drm/i915/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/i915_gem_context.c > @@ -700,21 +700,21 @@ static int do_switch(struct intel_ring_buffer *ring, > /* obj is kept alive until the next request by its active ref */ > i915_gem_object_ggtt_unpin(from->obj); > i915_gem_context_unreference(from); > - } else { > - if (to->is_initialized =3D=3D false) { > - ret =3D i915_gem_render_state_init(ring); > - if (ret) > - DRM_ERROR("init render state: %d\n", ret); > - } > } > = > - to->is_initialized =3D true; > - > done: > i915_gem_context_reference(to); > ring->last_context =3D to; > to->last_ring =3D ring; > = > + if (to->is_initialized =3D=3D false && from =3D=3D NULL) { > + ret =3D i915_gem_render_state_init(ring); > + if (ret) > + DRM_ERROR("init render state: %d\n", ret); > + } I think this will end badly on !RCS. So needs a ring check, and maybe throw a WARN into i915_gem_render_state_init() if it gets called with the wrong ring. > + > + to->is_initialized =3D true; > + > return 0; > = > unpin_out: > diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/d= rm/i915/i915_gem_render_state.c > index 392aa7b..d29e6b2 100644 > --- a/drivers/gpu/drm/i915/i915_gem_render_state.c > +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c > @@ -164,7 +164,6 @@ int i915_gem_render_state_init(struct intel_ring_buff= er *ring) > const int gen =3D INTEL_INFO(ring->dev)->gen; > struct i915_render_state *so; > const struct intel_renderstate_rodata *rodata; > - u32 seqno; > int ret; > = > rodata =3D render_state_get_rodata(ring->dev, gen); > @@ -186,7 +185,11 @@ int i915_gem_render_state_init(struct intel_ring_buf= fer *ring) > if (ret) > goto out; > = > - ret =3D i915_add_request(ring, &seqno); > + i915_gem_object_move_to_active(so->obj, ring); > + > + ret =3D __i915_add_request(ring, NULL, so->obj, NULL); > + if (ret) > + i915_gem_object_move_to_inactive(so->obj); > = > out: > render_state_free(so); > -- = > 1.7.9.5 -- = Ville Syrj=E4l=E4 Intel OTC