From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/5] drm/i915: Add fifo underrun reporting state to debugfs Date: Thu, 22 May 2014 20:02:53 +0300 Message-ID: <20140522170253.GZ27580@intel.com> References: <1400774195-19414-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B1166EC8D for ; Thu, 22 May 2014 10:03:32 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1400774195-19414-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Thu, May 22, 2014 at 05:56:31PM +0200, Daniel Vetter wrote: > On platforms with shared interrupt enable bits (which are shared even > with the pipe CRC logic) there's some tricky corner cases. Add > information to make debugging those easier. > = > Signed-off-by: Daniel Vetter For patches 1,3,4: Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++++ > 1 file changed, 4 insertions(+) > = > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i= 915_debugfs.c > index 16bbdc7243df..4a79d3fe35be 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2356,6 +2356,10 @@ static int i915_display_info(struct seq_file *m, v= oid *unused) > x, y, crtc->cursor_addr, > yesno(active)); > } > + > + seq_printf(m, "\tunderrun reporting: cpu=3D%s pch=3D%s \n", > + yesno(!crtc->cpu_fifo_underrun_disabled), > + yesno(!crtc->pch_fifo_underrun_disabled)); > } > = > seq_printf(m, "\n"); > -- = > 1.8.4.rc3 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC