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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 5/5] drm/i915: Improve irq handling after gpu resets
Date: Thu, 22 May 2014 20:06:34 +0300	[thread overview]
Message-ID: <20140522170634.GA27580@intel.com> (raw)
In-Reply-To: <20140522165145.GW27580@intel.com>

On Thu, May 22, 2014 at 07:51:45PM +0300, Ville Syrjälä wrote:
> On Thu, May 22, 2014 at 05:56:35PM +0200, Daniel Vetter wrote:
> > Currently we do a full re-init of all interrupts after a gpu hang.
> > Which is pretty bad since we don't restore the interrupts we've
> > enabled at runtime correctly. Even with that addressed it's rather
> > horribly race.
> > 
> > But on g4x and later we only reset the gt and not the entire gpu.
> > Which means we only need to reset the GT interrupt bits. Which has the
> > nice benefit that vblank waits, pipe CRC interrupts and everything
> > else display related just keeps on working.
> > 
> > The downside is that gt interrupt handling (i.e. ring->get/put_irq) is
> > still racy. But as long as the gpu hang reliably wakes all waters and
> > we have a short time where the refcount drops to 0 we'll recover. So
> > not that bad really.
> 
> A quick test on IVB tells me that GTIMR and GEN6_PMIMR survive the full
> gt reset. But the ring IMRs do get clobbered. So could we just skip the
> entire irq reset here?

Same on ILK. GTIMR survives both render and media resets.

-- 
Ville Syrjälä
Intel OTC

  reply	other threads:[~2014-05-22 17:06 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-22 15:56 [PATCH 1/5] drm/i915: Add fifo underrun reporting state to debugfs Daniel Vetter
2014-05-22 15:56 ` [PATCH 2/5] drm/i915: Fix up fifo underrun tracking, take N Daniel Vetter
2014-05-22 16:55   ` Ville Syrjälä
2014-05-22 20:10     ` Daniel Vetter
2014-05-23  8:11       ` Ville Syrjälä
2014-05-23  8:21         ` Daniel Vetter
2014-05-26  8:09           ` Ville Syrjälä
2014-05-26  8:11             ` Daniel Vetter
2014-05-22 15:56 ` [PATCH 3/5] drm/i915: Disable gpu reset on i965g/gm Daniel Vetter
2014-05-22 15:56 ` [PATCH 4/5] drm/i915: Inline ilk/gen8_irq_reset Daniel Vetter
2014-05-22 15:56 ` [PATCH 5/5] drm/i915: Improve irq handling after gpu resets Daniel Vetter
2014-05-22 16:51   ` Ville Syrjälä
2014-05-22 17:06     ` Ville Syrjälä [this message]
2014-05-22 20:12     ` Daniel Vetter
2014-05-22 20:18   ` [PATCH 1/2] " Daniel Vetter
2014-05-22 20:18     ` [PATCH 2/2] drm/i915: Extract gen8_gt_irq_reset Daniel Vetter
2014-05-26  8:36     ` [PATCH 1/2] drm/i915: Improve irq handling after gpu resets Ville Syrjälä
2014-05-26 10:48       ` Daniel Vetter
2014-05-22 17:02 ` [PATCH 1/5] drm/i915: Add fifo underrun reporting state to debugfs Ville Syrjälä

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