From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 70/71] drm/i915: Don't use pipe_offset stuff for DPLL registers Date: Tue, 27 May 2014 19:02:35 +0200 Message-ID: <20140527170235.GD14841@phenom.ffwll.local> References: <1397039349-10639-1-git-send-email-ville.syrjala@linux.intel.com> <1397039349-10639-71-git-send-email-ville.syrjala@linux.intel.com> <20140409191803.GF18823@strange.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-we0-f176.google.com (mail-we0-f176.google.com [74.125.82.176]) by gabe.freedesktop.org (Postfix) with ESMTP id C63696E772 for ; Tue, 27 May 2014 10:02:42 -0700 (PDT) Received: by mail-we0-f176.google.com with SMTP id q59so9656070wes.7 for ; Tue, 27 May 2014 10:02:42 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140409191803.GF18823@strange.amr.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Damien Lespiau Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Apr 09, 2014 at 08:18:03PM +0100, Damien Lespiau wrote: > On Wed, Apr 09, 2014 at 01:29:08PM +0300, ville.syrjala@linux.intel.com w= rote: > > From: Ville Syrj=E4l=E4 > > = > > These are just single registers so wasting space for the pipe offsets > > seems a bit pointless. So just use the _PIPE3() macro instead. > > = > > Also rewrite the _PIPE3() macro to be more obvious, and protect the > > arguments properly. > > = > > Signed-off-by: Ville Syrj=E4l=E4 > = > Reviewed-by: Damien Lespiau This one here required a bit of conflict resolution. But now all patches from this series should be applied, yay! And it took less than 8 weeks. -Daniel -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch