* [PATCH] [v2] drm/i915/bdw: Always issue a force restore [not found] <+1401318160-3199-1-git-send-email-benjamin.widawsky@intel.com> @ 2014-05-28 23:05 ` Ben Widawsky 2014-05-28 23:06 ` [PATCH] [v3] " Ben Widawsky 1 sibling, 0 replies; 4+ messages in thread From: Ben Widawsky @ 2014-05-28 23:05 UTC (permalink / raw) To: Intel GFX; +Cc: Ben Widawsky, Ben Widawsky The PDPs seem to get screwed up otherwise, specifically PDP0. I am not really clear why this is required, it just works with full PPGTT. v2: Only do it for gen8, to limit regression potential Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78891 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78934 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78935 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78936 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78937 Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- drivers/gpu/drm/i915/i915_gem_context.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 3ffe308..c5330ab 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -568,6 +568,9 @@ mi_set_context(struct intel_engine_cs *ring, else intel_ring_emit(ring, MI_NOOP); + if (INTEL_INFO(ring->dev)->gen == 8) + hw_flags |= MI_FORCE_RESTORE; + intel_ring_emit(ring, MI_NOOP); intel_ring_emit(ring, MI_SET_CONTEXT); intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) | -- 1.9.3 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] [v3] drm/i915/bdw: Always issue a force restore [not found] <+1401318160-3199-1-git-send-email-benjamin.widawsky@intel.com> 2014-05-28 23:05 ` [PATCH] [v2] drm/i915/bdw: Always issue a force restore Ben Widawsky @ 2014-05-28 23:06 ` Ben Widawsky 2014-05-29 5:54 ` Ben Widawsky 1 sibling, 1 reply; 4+ messages in thread From: Ben Widawsky @ 2014-05-28 23:06 UTC (permalink / raw) To: Intel GFX; +Cc: Ben Widawsky, Ben Widawsky The PDPs seem to get screwed up otherwise, specifically PDP0. I am not really clear why this is required, it just works with full PPGTT. v2: Only do it for gen8, to limit regression potential v3: Fix the bugzilla links Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78891 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78935 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78936 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78937 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78938 Signed-off-by: Ben Widawsky <ben@bwidawsk.net> --- drivers/gpu/drm/i915/i915_gem_context.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 3ffe308..c5330ab 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -568,6 +568,9 @@ mi_set_context(struct intel_engine_cs *ring, else intel_ring_emit(ring, MI_NOOP); + if (INTEL_INFO(ring->dev)->gen == 8) + hw_flags |= MI_FORCE_RESTORE; + intel_ring_emit(ring, MI_NOOP); intel_ring_emit(ring, MI_SET_CONTEXT); intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) | -- 1.9.3 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] [v3] drm/i915/bdw: Always issue a force restore 2014-05-28 23:06 ` [PATCH] [v3] " Ben Widawsky @ 2014-05-29 5:54 ` Ben Widawsky 2014-05-29 6:32 ` Ben Widawsky 0 siblings, 1 reply; 4+ messages in thread From: Ben Widawsky @ 2014-05-29 5:54 UTC (permalink / raw) To: Ben Widawsky; +Cc: Intel GFX On Wed, May 28, 2014 at 04:06:58PM -0700, Ben Widawsky wrote: > The PDPs seem to get screwed up otherwise, specifically PDP0. I am not > really clear why this is required, it just works with full PPGTT. > > v2: Only do it for gen8, to limit regression potential > > v3: Fix the bugzilla links I should note there is a problem with this patch. Without full PPGTT, we also do a restore inhibit on the default context, and therefore any test which is running and not using contexts (like everything in IGT) is programming restore inhibit as well as force restore, which as has been pointed out in the semaphore series is weird at best. All I know is the patch fixed at least a few of the bugs mentioned below. I guess we'll figure out what to do when the QA results come in. [snip] -- Ben Widawsky, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] [v3] drm/i915/bdw: Always issue a force restore 2014-05-29 5:54 ` Ben Widawsky @ 2014-05-29 6:32 ` Ben Widawsky 0 siblings, 0 replies; 4+ messages in thread From: Ben Widawsky @ 2014-05-29 6:32 UTC (permalink / raw) To: Ben Widawsky; +Cc: Intel GFX On Wed, May 28, 2014 at 10:54:21PM -0700, Ben Widawsky wrote: > On Wed, May 28, 2014 at 04:06:58PM -0700, Ben Widawsky wrote: > > The PDPs seem to get screwed up otherwise, specifically PDP0. I am not > > really clear why this is required, it just works with full PPGTT. > > > > v2: Only do it for gen8, to limit regression potential > > > > v3: Fix the bugzilla links > > I should note there is a problem with this patch. Without full PPGTT, we > also do a restore inhibit on the default context, and therefore any test > which is running and not using contexts (like everything in IGT) is > programming restore inhibit as well as force restore, which as has been > pointed out in the semaphore series is weird at best. > > All I know is the patch fixed at least a few of the bugs mentioned > below. I guess we'll figure out what to do when the QA results come in. > > [snip] > Okay, now I am really confused. I've changed machines and none of these tests are passing for me now. Until I figured out what happened, please ignore this thread. Sorry for the noise. -- Ben Widawsky, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 4+ messages in thread
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2014-05-28 23:05 ` [PATCH] [v2] drm/i915/bdw: Always issue a force restore Ben Widawsky
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