From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v2 01/16] drm/i915: Keep vblank interrupts enabled while enabling/disabling planes Date: Tue, 10 Jun 2014 19:22:49 +0300 Message-ID: <20140610162249.GE27580@intel.com> References: <1400770101-14277-1-git-send-email-ville.syrjala@linux.intel.com> <1400770101-14277-2-git-send-email-ville.syrjala@linux.intel.com> <20140526135617.GR14357@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 546526E2DE for ; Tue, 10 Jun 2014 09:23:42 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Arun Murthy Cc: intel-gfx List-Id: intel-gfx@lists.freedesktop.org On Wed, Jun 04, 2014 at 11:30:47AM +0530, Arun Murthy wrote: > On Mon, May 26, 2014 at 7:26 PM, Daniel Vetter wrote: > > On Thu, May 22, 2014 at 05:48:06PM +0300, ville.syrjala@linux.intel.com= wrote: > >> From: Ville Syrj=E4l=E4 > >> > >> Because of the upcoming vblank interrupt driven watermark update > >> mechanism we will have use for vblank interrupts during plane > >> enabling/disabling. So don't call drm_vblank_off() until planes > >> are off, and call drm_vblank_on() just before we start to enable > >> the planes. > = > Since watermark and display control registers are double buffered > both of them get updated on next blank and hence in sync. > Can you let me know the need for vblank driven watermark updates? Watermark registers aren't double buffered. -- = Ville Syrj=E4l=E4 Intel OTC