From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 2/3] drm/i915: correct BLC vs PWM enable/disable ordering Date: Thu, 19 Jun 2014 11:00:20 -0700 Message-ID: <20140619110020.50a52a5e@jbarnes-desktop> References: <1396289637-1013-1-git-send-email-jbarnes@virtuousgeek.org> <1396289637-1013-2-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-pb0-f46.google.com (mail-pb0-f46.google.com [209.85.160.46]) by gabe.freedesktop.org (Postfix) with ESMTP id 319D66E908 for ; Thu, 19 Jun 2014 10:59:57 -0700 (PDT) Received: by mail-pb0-f46.google.com with SMTP id md12so2158639pbc.19 for ; Thu, 19 Jun 2014 10:59:56 -0700 (PDT) In-Reply-To: <1396289637-1013-2-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Jani, can you review this one? It's still needed for us to conform to the eDP timing spec. Thanks, Jesse On Mon, 31 Mar 2014 11:13:56 -0700 Jesse Barnes wrote: > With the new checks in place, we can see we're doing things backwards, > so fix them up per the spec. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/intel_dp.c | 13 +++++++------ > 1 file changed, 7 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index b6f7087..d540fbe 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1273,8 +1273,6 @@ void intel_edp_panel_off(struct intel_dp *intel_dp) > > DRM_DEBUG_KMS("Turn eDP power off\n"); > > - edp_wait_backlight_off(intel_dp); > - > WARN(!intel_dp->want_panel_vdd, "Need VDD to turn off panel\n"); > > /* By this time the PWM and BLC bits should be off already */ > @@ -1316,6 +1314,9 @@ void intel_edp_backlight_on(struct intel_dp *intel_dp) > return; > > DRM_DEBUG_KMS("\n"); > + > + intel_panel_enable_backlight(intel_dp->attached_connector); > + > /* > * If we enable the backlight right away following a panel power > * on, we may see slight flicker as the panel syncs with the eDP > @@ -1333,8 +1334,6 @@ void intel_edp_backlight_on(struct intel_dp *intel_dp) > > I915_WRITE(pp_ctrl_reg, pp); > POSTING_READ(pp_ctrl_reg); > - > - intel_panel_enable_backlight(intel_dp->attached_connector); > } > > void intel_edp_backlight_off(struct intel_dp *intel_dp) > @@ -1350,8 +1349,6 @@ void intel_edp_backlight_off(struct intel_dp *intel_dp) > /* PWM must still be enabled here */ > assert_pwm_enabled(intel_dp->attached_connector); > > - intel_panel_disable_backlight(intel_dp->attached_connector); > - > DRM_DEBUG_KMS("\n"); > pp = ironlake_get_pp_control(intel_dp); > pp &= ~EDP_BLC_ENABLE; > @@ -1361,6 +1358,10 @@ void intel_edp_backlight_off(struct intel_dp *intel_dp) > I915_WRITE(pp_ctrl_reg, pp); > POSTING_READ(pp_ctrl_reg); > intel_dp->last_backlight_off = jiffies; > + > + edp_wait_backlight_off(intel_dp); > + > + intel_panel_disable_backlight(intel_dp->attached_connector); > } > > static void ironlake_edp_pll_on(struct intel_dp *intel_dp) -- Jesse Barnes, Intel Open Source Technology Center