From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH v2] drm/i915: Drop WA to fix Voltage not
 getting dropped to Vmin when Gfx is power gated for latest VLV revision
Date: Fri, 27 Jun 2014 13:10:09 +0300
Message-ID: <20140627101009.GE27580@intel.com>
References: <539AEE01.1040208@linux.intel.com>
 <1403934971-3748-1-git-send-email-deepak.s@linux.intel.com>
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On Sat, Jun 28, 2014 at 11:26:11AM +0530, deepak.s@linux.intel.com wrote:
> From: Deepak S <deepak.s@linux.intel.com>
> =

> Workaround fixed in Latest VLV revision. Forcing Gfx clk up not needed, a=
nd Requesting the
> min freq should bring bring the voltage Vnn.
> =

> v2: Drop WA for Latest VLV revision (Ville)
> =

> Signed-off-by: Deepak S <deepak.s@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> =

> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel=
_pm.c
> index a90fdbd..6b6cfd4 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3212,6 +3212,14 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
>  */
>  static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
>  {
> +	struct drm_device *dev =3D dev_priv->dev;
> +
> +	/* Latest VLV doesn't need Vnn WA*/

Maybe this should say "Latest VLV doesn't need to force the gfx clock"
or something like that. We are still doing this to reduce Vnn after all.

Apart from that this matches my observations so:
Reviewed-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>

> +	if (dev->pdev->revision >=3D 0xd) {
> +		valleyview_set_rps(dev_priv->dev, dev_priv->rps.min_freq_softlimit);
> +		return;
> +	}
> +
>  	/*
>  	 * When we are idle.  Drop to min voltage state.
>  	 */
> -- =

> 1.9.1

-- =

Ville Syrj=E4l=E4
Intel OTC