From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915/bdw: 3D_CHICKEN3 has write mask bits Date: Mon, 7 Jul 2014 18:31:38 +0200 Message-ID: <20140707163138.GP5821@phenom.ffwll.local> References: <1404733217-13185-1-git-send-email-michel.thierry@intel.com> <87k37puxmt.fsf@gaia.fi.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f47.google.com (mail-wg0-f47.google.com [74.125.82.47]) by gabe.freedesktop.org (Postfix) with ESMTP id E99AE89DBD for ; Mon, 7 Jul 2014 09:31:28 -0700 (PDT) Received: by mail-wg0-f47.google.com with SMTP id l18so2014724wgh.30 for ; Mon, 07 Jul 2014 09:31:28 -0700 (PDT) Content-Disposition: inline In-Reply-To: <87k37puxmt.fsf@gaia.fi.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Mika Kuoppala Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Jul 07, 2014 at 04:06:02PM +0300, Mika Kuoppala wrote: > michel.thierry@intel.com writes: > > > From: Michel Thierry > > > > The workaround to limit SDE poly depth FIFO to 2 is not applied because > > 3D Chicken-3 mask bit is not set. > > > > WaLimitSizeOfSDEPolyFifo is only for BDW-A and could be removed. > > > > Signed-off-by: Michel Thierry > Reviewed-by: Mika Kuoppala Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch