From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [RFC 07/44] drm/i915: Disable 'get seqno' workaround for VLV Date: Mon, 7 Jul 2014 20:56:42 +0200 Message-ID: <20140707185642.GY5821@phenom.ffwll.local> References: <1403803475-16337-1-git-send-email-John.C.Harrison@Intel.com> <1403803475-16337-8-git-send-email-John.C.Harrison@Intel.com> <20140702105123.45815c7a@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f173.google.com (mail-wi0-f173.google.com [209.85.212.173]) by gabe.freedesktop.org (Postfix) with ESMTP id D491B6E3F2 for ; Mon, 7 Jul 2014 11:56:32 -0700 (PDT) Received: by mail-wi0-f173.google.com with SMTP id cc10so16452353wib.0 for ; Mon, 07 Jul 2014 11:56:31 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140702105123.45815c7a@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: Intel-GFX@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Jul 02, 2014 at 10:51:23AM -0700, Jesse Barnes wrote: > On Thu, 26 Jun 2014 18:23:58 +0100 > John.C.Harrison@Intel.com wrote: > > > From: John Harrison > > > > There is a workaround for a hardware bug when reading the seqno from the status > > page. The bug does not exist on VLV however, the workaround was still being > > applied. > > --- > > drivers/gpu/drm/i915/intel_ringbuffer.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > > index 279488a..bad5db0 100644 > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > @@ -1960,7 +1960,10 @@ int intel_init_render_ring_buffer(struct drm_device *dev) > > ring->irq_put = gen6_ring_put_irq; > > } > > ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT; > > - ring->get_seqno = gen6_ring_get_seqno; > > + if (IS_VALLEYVIEW(dev)) > > + ring->get_seqno = ring_get_seqno; > > + else > > + ring->get_seqno = gen6_ring_get_seqno; > > ring->set_seqno = ring_set_seqno; > > ring->semaphore.sync_to = gen6_ring_sync; > > ring->semaphore.signal = gen6_signal; > > Assuming this has been well tested: > Reviewed-by: Jesse Barnes I have my doubts ... the seqno race is fairly hard to reproduce really and needs some serious beating. Also highly timing dependent. My best guess is that Oscar's irq handling race fixes fixed the underlying bug on gen6+, so I think we should instead dare to rip out this w/a completely and see what happens. Doing this on gen6+ will at least give us serious amounts of test coverage. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch