From: Daniel Vetter <daniel@ffwll.ch>
To: Dave Airlie <airlied@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] Revert "drm/i915: reverse dp link param selection, prefer fast over wide again"
Date: Mon, 14 Jul 2014 23:18:23 +0200 [thread overview]
Message-ID: <20140714211823.GL15237@phenom.ffwll.local> (raw)
In-Reply-To: <1405299879-20093-1-git-send-email-airlied@gmail.com>
On Mon, Jul 14, 2014 at 11:04:39AM +1000, Dave Airlie wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> This reverts commit 38aecea0ccbb909d635619cba22f1891e589b434.
>
> This breaks Haswell Thinkpad + Lenovo dock in SST mode with a HDMI monitor attached.
>
> Before this we can 1920x1200 mode, after this we only ever get 1024x768, and
> a lot of deferring.
>
> This didn't revert clean, but this should be fine.
>
> bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1117008
> Cc: stable@vger.kernel.org # v3.15
> Signed-off-by: Dave Airlie <airlied@redhat.com>
Picked up for -fixes, thanks for the patch. We've carried around the
bdw-specific hack
commit f4cdbc21444a45d207a8dc175f44d2facfbd0845
Author: Jani Nikula <jani.nikula@intel.com>
Date: Wed May 14 13:02:19 2014 +0300
drm/i915/dp: force eDP lane count to max available lanes on BDW
since a few months, the original patch is even older and yes, hsw is also
affected here. And nothing happened. It's time to give up an revert.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_dp.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 2a00cb8..61963d3 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -833,8 +833,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
> bpp);
>
> - for (lane_count = min_lane_count; lane_count <= max_lane_count; lane_count <<= 1) {
> - for (clock = min_clock; clock <= max_clock; clock++) {
> + for (clock = min_clock; clock <= max_clock; clock++) {
> + for (lane_count = min_lane_count; lane_count <= max_lane_count; lane_count <<= 1) {
> link_clock = drm_dp_bw_code_to_link_rate(bws[clock]);
> link_avail = intel_dp_max_data_rate(link_clock,
> lane_count);
> --
> 1.9.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
prev parent reply other threads:[~2014-07-14 21:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-14 1:04 [PATCH] Revert "drm/i915: reverse dp link param selection, prefer fast over wide again" Dave Airlie
2014-07-14 7:02 ` Daniel Vetter
2014-07-14 21:18 ` Daniel Vetter [this message]
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