From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/2] drm/i915: BDW can also detect unclaimed registers Date: Thu, 17 Jul 2014 10:33:44 +0200 Message-ID: <20140717083344.GC15237@phenom.ffwll.local> References: <20140716135707.GY15237@phenom.ffwll.local> <1405543770-3212-1-git-send-email-przanoni@gmail.com> <1405543770-3212-2-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-we0-f180.google.com (mail-we0-f180.google.com [74.125.82.180]) by gabe.freedesktop.org (Postfix) with ESMTP id 75A926E1BC for ; Thu, 17 Jul 2014 01:33:43 -0700 (PDT) Received: by mail-we0-f180.google.com with SMTP id w61so1973656wes.11 for ; Thu, 17 Jul 2014 01:33:40 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1405543770-3212-2-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Wed, Jul 16, 2014 at 05:49:30PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > By the time I wrote this patch, it allowed me to catch some problems. > But due to patch reordering - in order to prevent fake "regression" > reports - this patch may be merged after the fixes of the problems > identified by this patch. > > Reviewed-by: Rodrigo Vivi > Signed-off-by: Paulo Zanoni Pulled in, thanks for the resend. And my apology for the mess I've made yesterday. -Daniel > --- > drivers/gpu/drm/i915/i915_drv.c | 4 ++++ > drivers/gpu/drm/i915/intel_uncore.c | 3 +++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 5e4fefd..3315358 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -303,6 +303,7 @@ static const struct intel_device_info intel_broadwell_d_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > .has_llc = 1, > .has_ddi = 1, > + .has_fpga_dbg = 1, > .has_fbc = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > @@ -314,6 +315,7 @@ static const struct intel_device_info intel_broadwell_m_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > .has_llc = 1, > .has_ddi = 1, > + .has_fpga_dbg = 1, > .has_fbc = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > @@ -325,6 +327,7 @@ static const struct intel_device_info intel_broadwell_gt3d_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, > .has_llc = 1, > .has_ddi = 1, > + .has_fpga_dbg = 1, > .has_fbc = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > @@ -336,6 +339,7 @@ static const struct intel_device_info intel_broadwell_gt3m_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, > .has_llc = 1, > .has_ddi = 1, > + .has_fpga_dbg = 1, > .has_fbc = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 6fee122..e81bc3b 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -747,6 +747,7 @@ static bool is_gen8_shadowed(struct drm_i915_private *dev_priv, u32 reg) > static void \ > gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \ > REG_WRITE_HEADER; \ > + hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \ > if (reg < 0x40000 && !is_gen8_shadowed(dev_priv, reg)) { \ > if (dev_priv->uncore.forcewake_count == 0) \ > dev_priv->uncore.funcs.force_wake_get(dev_priv, \ > @@ -758,6 +759,8 @@ gen8_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace > } else { \ > __raw_i915_write##x(dev_priv, reg, val); \ > } \ > + hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \ > + hsw_unclaimed_reg_detect(dev_priv); \ > REG_WRITE_FOOTER; \ > } > > -- > 2.0.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch