Re: [PATCH] drm/i915/chv: Use timeout mode for RC6 on chv

[Ben Widawsky <ben@bwidawsk.net>]

On Tue, Jul 22, 2014 at 01:50:20PM +0530, Deepak S wrote:
> 
> On Thursday 17 July 2014 09:16 AM, deepak.s@linux.intel.com wrote:
> >From: Deepak S <deepak.s@linux.intel.com>
> >
> >Higher RC6 residency is observed using timeout mode
> >instead of EI mode. It's Recommended to use TO Method for RC6.
> >
> >Signed-off-by: Deepak S <deepak.s@linux.intel.com>
> >---
> >  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> >index 19c5c26..88bad36 100644
> >--- a/drivers/gpu/drm/i915/intel_pm.c
> >+++ b/drivers/gpu/drm/i915/intel_pm.c
> >@@ -4037,7 +4037,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
> >  		I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
> >  	I915_WRITE(GEN6_RC_SLEEP, 0);
> >-	I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
> >+	I915_WRITE(GEN6_RC6_THRESHOLD, 0x557);
> >  	/* allows RC6 residency counter to work */
> >  	I915_WRITE(VLV_COUNTER_CONTROL,
> >@@ -4053,7 +4053,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
> >  	/* 3: Enable RC6 */
> >  	if ((intel_enable_rc6(dev) & INTEL_RC6_ENABLE) &&
> >  						(pcbr >> VLV_PCBR_ADDR_SHIFT))
> >-		rc6_mode = GEN6_RC_CTL_EI_MODE(1);
> >+		rc6_mode = GEN7_RC_CTL_TO_MODE;
> >  	I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
> 
> Hi Ben,
> 
> Please review the patch

Why me? I don't know anything about Cherryview. I only put the r-b on
the BDW version because of the public QA data which showed it was a win
for power without hurting performance.

I'd suggest you get Tom O'Rourke to review this.

> 
> Thanks
> Deepak
> 

-- 
Ben Widawsky, Intel Open Source Technology Center