From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 10/12] drm/i915: Update link training automated test function for Displayport compliance Date: Tue, 22 Jul 2014 13:40:59 -0700 Message-ID: <20140722134059.3dbef8a7@jbarnes-desktop> References: <1405365047-6866-1-git-send-email-tprevite@gmail.com> <1405365047-6866-11-git-send-email-tprevite@gmail.com> <20140722061530.GD15237@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-pd0-f176.google.com (mail-pd0-f176.google.com [209.85.192.176]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C67A6E307 for ; Tue, 22 Jul 2014 13:39:45 -0700 (PDT) Received: by mail-pd0-f176.google.com with SMTP id y10so233350pdj.7 for ; Tue, 22 Jul 2014 13:39:45 -0700 (PDT) In-Reply-To: <20140722061530.GD15237@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 22 Jul 2014 08:15:30 +0200 Daniel Vetter wrote: > On Mon, Jul 14, 2014 at 12:10:45PM -0700, Todd Previte wrote: > > Implements basic link training functionality for Displayport automated compliance > > testing. > > > > Signed-off-by: Todd Previte > > --- > > drivers/gpu/drm/i915/intel_dp.c | 47 +++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 47 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 65830e9..e4b31ad 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -3427,6 +3427,53 @@ static uint8_t > > intel_dp_autotest_link_training(struct intel_dp *intel_dp) > > { > > uint8_t test_result = DP_TEST_NAK; > > + uint8_t rxdata[2]; > > + uint8_t link_status[DP_LINK_STATUS_SIZE]; > > + int bytes_ret = 0; > > + struct drm_connector *connector = &intel_dp->attached_connector->base; > > + struct intel_digital_port *intel_dig_port = > > + enc_to_dig_port(&intel_dp->attached_connector->encoder->base); > > + > > + /* Read test parameters */ > > + bytes_ret = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_LINK_RATE, rxdata, 2); > > + > > + /* Set link rate directly */ > > + intel_dp->link_bw = rxdata[0]; > > + /* Preserve 7:5 when setting lane count */ > > + intel_dp->lane_count &= 0xE0; > > + intel_dp->lane_count |= rxdata[1]; > > This won't work - if you change the link config you need to do a full > recomputation of the modeset config and a full modeset. No, we dont (yet) > have the infrastructure for this, which is why dp is such a pain since we > can change the link config once we've decided on something :( I think that depends on how we're going to structure the code. For simply calling the link train functions, it looks like messing with the intel_dp->foo fields will roughly do what Todd wants, which is to simply try a re-train with a different set of params, ignoring the actual fb and pipe configuration. Or is that what you had in mind? You'd like to see valid data and mode timings to drive a given lane count and bw instead? I'm not sure the testing spec cares about that; Todd? -- Jesse Barnes, Intel Open Source Technology Center