From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 29/40] drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper. Date: Wed, 30 Jul 2014 22:23:54 +0200 Message-ID: <20140730202342.GA8727@phenom.ffwll.local> References: <1403910271-24984-1-git-send-email-ville.syrjala@linux.intel.com> <1403910271-24984-30-git-send-email-ville.syrjala@linux.intel.com> <20140729095953.7b25ed1d@jbarnes-desktop> <20140729180153.GV4747@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-we0-f179.google.com (mail-we0-f179.google.com [74.125.82.179]) by gabe.freedesktop.org (Postfix) with ESMTP id 50E2289BAB for ; Wed, 30 Jul 2014 13:23:59 -0700 (PDT) Received: by mail-we0-f179.google.com with SMTP id u57so1758874wes.24 for ; Wed, 30 Jul 2014 13:23:58 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140729180153.GV4747@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Jul 29, 2014 at 08:01:53PM +0200, Daniel Vetter wrote: > On Tue, Jul 29, 2014 at 09:59:53AM -0700, Jesse Barnes wrote: > > On Sat, 28 Jun 2014 02:04:20 +0300 > > ville.syrjala@linux.intel.com wrote: > > > > > From: Kenneth Graunke > > > > > > We'll want to reuse this for a workaround. > > > > > > Signed-off-by: Kenneth Graunke > > > --- > > > drivers/gpu/drm/i915/intel_ringbuffer.c | 36 ++++++++++++++++++++------------- > > > 1 file changed, 22 insertions(+), 14 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > > > index 2faef26..97796b1 100644 > > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > > @@ -381,6 +381,27 @@ gen7_render_ring_flush(struct intel_engine_cs *ring, > > > } > > > > > > static int > > > +gen8_emit_pipe_control(struct intel_engine_cs *ring, > > > + u32 flags, u32 scratch_addr) > > > +{ > > > + int ret; > > > + > > > + ret = intel_ring_begin(ring, 6); > > > + if (ret) > > > + return ret; > > > + > > > + intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(6)); > > > + intel_ring_emit(ring, flags); > > > + intel_ring_emit(ring, scratch_addr); > > > + intel_ring_emit(ring, 0); > > > + intel_ring_emit(ring, 0); > > > + intel_ring_emit(ring, 0); > > > + intel_ring_advance(ring); > > > + > > > + return 0; > > > +} > > > + > > > +static int > > > gen8_render_ring_flush(struct intel_engine_cs *ring, > > > u32 invalidate_domains, u32 flush_domains) > > > { > > > @@ -405,20 +426,7 @@ gen8_render_ring_flush(struct intel_engine_cs *ring, > > > flags |= PIPE_CONTROL_GLOBAL_GTT_IVB; > > > } > > > > > > - ret = intel_ring_begin(ring, 6); > > > - if (ret) > > > - return ret; > > > - > > > - intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(6)); > > > - intel_ring_emit(ring, flags); > > > - intel_ring_emit(ring, scratch_addr); > > > - intel_ring_emit(ring, 0); > > > - intel_ring_emit(ring, 0); > > > - intel_ring_emit(ring, 0); > > > - intel_ring_advance(ring); > > > - > > > - return 0; > > > - > > > + return gen8_emit_pipe_control(ring, flags, scratch_addr); > > > } > > > > > > static void ring_write_tail(struct intel_engine_cs *ring, > > > > Reviewed-by: Jesse Barnes > > Aside: checkpatch complains about this since it makes it harder to grep > for dmesg noise. But I guess if 3 people here like it I should merge it > ;-) That reply was meant for 27/40, not this patch here ofc. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch