From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v3 2/2] drm/i915: fix VDD state tracking after system resume Date: Fri, 1 Aug 2014 14:56:54 +0300 Message-ID: <20140801115654.GY4193@intel.com> References: <1406725052-31791-2-git-send-email-imre.deak@intel.com> <1406804616-19361-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B21136E1D6 for ; Fri, 1 Aug 2014 04:56:57 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1406804616-19361-1-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Jul 31, 2014 at 02:03:36PM +0300, Imre Deak wrote: > Just like during booting the BIOS can leave the VDD bit enabled after > system resume. So apply the same state sanitization there too. This > fixes a problem where after resume the port power domain refcount gets > unbalanced. > = > v2: > - unchanged > v3: > - call edp sanitizing from the encoder reset handler (Daniel) It happens a bit earlier than with the earlier attempt, but if it works it works. Reviewed-by: Ville Syrj=E4l=E4 > = > Reported-and-tested-by: Jarkko Nikula > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++ > 1 file changed, 6 insertions(+) > = > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel= _dp.c > index 71294b5..8741439 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -4002,6 +4002,11 @@ void intel_dp_encoder_destroy(struct drm_encoder *= encoder) > kfree(intel_dig_port); > } > = > +static void intel_dp_encoder_reset(struct drm_encoder *encoder) > +{ > + intel_edp_panel_vdd_sanitize(to_intel_encoder(encoder)); > +} > + > static const struct drm_connector_funcs intel_dp_connector_funcs =3D { > .dpms =3D intel_connector_dpms, > .detect =3D intel_dp_detect, > @@ -4017,6 +4022,7 @@ static const struct drm_connector_helper_funcs inte= l_dp_connector_helper_funcs =3D > }; > = > static const struct drm_encoder_funcs intel_dp_enc_funcs =3D { > + .reset =3D intel_dp_encoder_reset, > .destroy =3D intel_dp_encoder_destroy, > }; > = > -- = > 1.8.4 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC