From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 5/7] drm/i915: avoid emiting semaphore wait on GEN8 when seqno wrap happened. Date: Tue, 5 Aug 2014 10:36:44 +0200 Message-ID: <20140805083644.GE8727@phenom.ffwll.local> References: <1407176119-5294-1-git-send-email-rodrigo.vivi@intel.com> <1407176119-5294-5-git-send-email-rodrigo.vivi@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f182.google.com (mail-wi0-f182.google.com [209.85.212.182]) by gabe.freedesktop.org (Postfix) with ESMTP id 922766E1AC for ; Tue, 5 Aug 2014 01:36:32 -0700 (PDT) Received: by mail-wi0-f182.google.com with SMTP id d1so861981wiv.15 for ; Tue, 05 Aug 2014 01:36:31 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1407176119-5294-5-git-send-email-rodrigo.vivi@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Rodrigo Vivi Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Aug 04, 2014 at 11:15:17AM -0700, Rodrigo Vivi wrote: This commit message is too thin. > C: Ben Widawsky > Signed-off-by: Rodrigo Vivi Does this blow up with Mika's seqno wrap testcase? If so please add the right Testcase: line, if not, how can we repro this? -Daniel > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 30 +++++++++++++++++++++--------- > 1 file changed, 21 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 2e566e0..cd30b39 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -867,15 +867,26 @@ gen8_ring_sync(struct intel_engine_cs *waiter, > if (ret) > return ret; > > - intel_ring_emit(waiter, MI_SEMAPHORE_WAIT | > - MI_SEMAPHORE_GLOBAL_GTT | > - MI_SEMAPHORE_POLL | > - MI_SEMAPHORE_SAD_GTE_SDD); > - intel_ring_emit(waiter, seqno); > - intel_ring_emit(waiter, > - lower_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id))); > - intel_ring_emit(waiter, > - upper_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id))); > + /* If seqno wrap happened, omit the wait with no-ops */ > + if (likely(!i915_gem_has_seqno_wrapped(waiter->dev, seqno))) { > + intel_ring_emit(waiter, MI_SEMAPHORE_WAIT | > + MI_SEMAPHORE_GLOBAL_GTT | > + MI_SEMAPHORE_POLL | > + MI_SEMAPHORE_SAD_GTE_SDD); > + intel_ring_emit(waiter, seqno); > + intel_ring_emit(waiter, > + lower_32_bits(GEN8_WAIT_OFFSET(waiter, > + signaller->id))); > + intel_ring_emit(waiter, > + upper_32_bits(GEN8_WAIT_OFFSET(waiter, > + signaller->id))); > + } else { > + intel_ring_emit(waiter, MI_NOOP); > + intel_ring_emit(waiter, MI_NOOP); > + intel_ring_emit(waiter, MI_NOOP); > + intel_ring_emit(waiter, MI_NOOP); > + } > + > intel_ring_advance(waiter); > return 0; > } > @@ -2572,6 +2583,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) > ring->semaphore.mbox.signal[BCS] = GEN6_BVESYNC; > ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC; > ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC; > + > } > } > ring->init = init_ring_common; > -- > 1.9.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch