From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: Fix erroneous conversion to u8 Date: Fri, 8 Aug 2014 20:52:56 +0200 Message-ID: <20140808185256.GY8727@phenom.ffwll.local> References: <20140808175623.GH4193@intel.com> <1407522357-18474-1-git-send-email-damien.lespiau@intel.com> <20140808183220.GI4193@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-we0-f175.google.com (mail-we0-f175.google.com [74.125.82.175]) by gabe.freedesktop.org (Postfix) with ESMTP id E31476E108 for ; Fri, 8 Aug 2014 11:52:44 -0700 (PDT) Received: by mail-we0-f175.google.com with SMTP id t60so5887024wes.6 for ; Fri, 08 Aug 2014 11:52:44 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140808183220.GI4193@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Aug 08, 2014 at 09:32:20PM +0300, Ville Syrj=E4l=E4 wrote: > On Fri, Aug 08, 2014 at 07:25:57PM +0100, Damien Lespiau wrote: > > adj was defined as u8. The issue is last_adj can be negative and adj is > > initialized with: > > = > > adj =3D dev_priv->rps.last_adj; > > = > > and we were also happily doing things like: > > = > > if (adj < 0) > > = > > (thank static analysers!) > > = > > v2: Make new_delay an int in case we overflow the u8 in the intermediate > > computations. new_delay will get clamped at the end anyway. (Ville) > > = > > Cc: Deepak S > > Cc: Ville Syrj=E4l=E4 > > Signed-off-by: Damien Lespiau > = > Reviewed-by: Ville Syrj=E4l=E4 Queued for -next, thanks for the patch. -Daniel > = > > --- > > drivers/gpu/drm/i915/i915_irq.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i91= 5_irq.c > > index 9fdf738..8e6729e 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -1327,10 +1327,10 @@ static u32 vlv_c0_residency(struct drm_i915_pri= vate *dev_priv, > > * @dev_priv: DRM device private > > * > > */ > > -static u32 vlv_calc_delay_from_C0_counters(struct drm_i915_private *de= v_priv) > > +static int vlv_calc_delay_from_C0_counters(struct drm_i915_private *de= v_priv) > > { > > u32 residency_C0_up =3D 0, residency_C0_down =3D 0; > > - u8 new_delay, adj; > > + int new_delay, adj; > > = > > dev_priv->rps.ei_interrupt_count++; > > = > > -- = > > 1.8.3.1 > = > -- = > Ville Syrj=E4l=E4 > Intel OTC > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch