From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [Intel-gfx] [PATCH] drm/i915: fix plane/cursor handling when runtime suspended Date: Fri, 15 Aug 2014 11:39:50 +0300 Message-ID: <20140815083950.GP4193@intel.com> References: <20140813075918.GN10500@phenom.ffwll.local> <1408028762-2031-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Content-Disposition: inline In-Reply-To: <1408028762-2031-1-git-send-email-przanoni@gmail.com> Sender: stable-owner@vger.kernel.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni , stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Aug 14, 2014 at 12:06:02PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni >=20 > If we're runtime suspended and try to use the plane interfaces, we > will get a lot of WARNs saying we did the wrong thing. >=20 > We need to get runtime PM references to pin the objects, and to > change the fences. The pin functions are the ideal places for > this, but intel_crtc_cursor_set_obj() doesn't call them, so we also > have to add get/put calls inside it. There is no problem if we runtim= e > suspend right after these functions are finished, because the > registers written are forwarded to system memory. >=20 > Note: for a complete fix of the cursor-dpms test case, we also need > the patch named "drm/i915: Don't try to enable cursor from setplane > when crtc is disabled". >=20 > v2: - Narrow the put/get calls on intel_crtc_cursor_set_obj() (Daniel= ) > v3: - Make get/put also surround the fence and unpin calls (Daniel an= d > Ville). > - Merge all the plane changes into a single patch since they're > the same fix. > - Add the comment requested by Daniel. > v4: - Remove spurious whitespace (Ville). > v5: - Remove intel_crtc_update_cursor() chunk since Ville did an > equivalent fix in another patch (Ville). > v6: - Remove unpin chunk: it will be on a separate patch (Ville, > Chris, Daniel). >=20 > Testcase: igt/pm_rpm/cursor > Testcase: igt/pm_rpm/cursor-dpms > Testcase: igt/pm_rpm/legacy-planes > Testcase: igt/pm_rpm/legacy-planes-dpms > Testcase: igt/pm_rpm/universal-planes > Testcase: igt/pm_rpm/universal-planes-dpms > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3D81645 > Cc: stable@vger.kernel.org > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_display.c | 27 ++++++++++++++++++++++++++= + > 1 file changed, 27 insertions(+) >=20 >=20 > I talked with Daniel and we agreed to leave any possible fixes relate= d with the > "unpin" functions to separate patches, possibly requiring separate IG= T test > cases. >=20 > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i= 915/intel_display.c > index 3813526..17bc661 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2149,6 +2149,15 @@ intel_pin_and_fence_fb_obj(struct drm_device *= dev, > if (need_vtd_wa(dev) && alignment < 256 * 1024) > alignment =3D 256 * 1024; > =20 > + /* > + * Global gtt pte registers are special registers which actually fo= rward > + * writes to a chunk of system memory. Which means that there is no= risk > + * that the register values disappear as soon as we call > + * intel_runtime_pm_put(), so it is correct to wrap only the > + * pin/unpin/fence and not more. > + */ > + intel_runtime_pm_get(dev_priv); > + > dev_priv->mm.interruptible =3D false; > ret =3D i915_gem_object_pin_to_display_plane(obj, alignment, pipeli= ned); > if (ret) > @@ -2166,12 +2175,14 @@ intel_pin_and_fence_fb_obj(struct drm_device = *dev, > i915_gem_object_pin_fence(obj); > =20 > dev_priv->mm.interruptible =3D true; > + intel_runtime_pm_put(dev_priv); > return 0; > =20 > err_unpin: > i915_gem_object_unpin_from_display_plane(obj); > err_interruptible: > dev_priv->mm.interruptible =3D true; > + intel_runtime_pm_put(dev_priv); > return ret; > } > =20 > @@ -8201,6 +8212,7 @@ static int intel_crtc_cursor_set_obj(struct drm= _crtc *crtc, > uint32_t width, uint32_t height) > { > struct drm_device *dev =3D crtc->dev; > + struct drm_i915_private *dev_priv =3D dev->dev_private; > struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > enum pipe pipe =3D intel_crtc->pipe; > unsigned old_width, stride; > @@ -8231,6 +8243,16 @@ static int intel_crtc_cursor_set_obj(struct dr= m_crtc *crtc, > =20 > /* we only need to pin inside GTT if cursor is non-phy */ > mutex_lock(&dev->struct_mutex); > + > + /* > + * Global gtt pte registers are special registers which actually fo= rward > + * writes to a chunk of system memory. Which means that there is no= risk > + * that the register values disappear as soon as we call > + * intel_runtime_pm_put(), so it is correct to wrap only the > + * pin/unpin/fence and not more. > + */ > + intel_runtime_pm_get(dev_priv); > + Only the !cursor_needs_physical case need runtime pm get/put. I thought the calls were there originally, but I guess they got moved out. I suppose it's not a huge deal either way, but the current approach does give the reader the wrong impression that the unpin and frontbuffer tracking would also need a rpm reference. > if (!INTEL_INFO(dev)->cursor_needs_physical) { > unsigned alignment; > =20 > @@ -8280,6 +8302,10 @@ static int intel_crtc_cursor_set_obj(struct dr= m_crtc *crtc, > =20 > i915_gem_track_fb(intel_crtc->cursor_bo, obj, > INTEL_FRONTBUFFER_CURSOR(pipe)); > + > + if (obj) > + intel_runtime_pm_put(dev_priv); > + > mutex_unlock(&dev->struct_mutex); > =20 > old_width =3D intel_crtc->cursor_width; > @@ -8301,6 +8327,7 @@ static int intel_crtc_cursor_set_obj(struct drm= _crtc *crtc, > fail_unpin: > i915_gem_object_unpin_from_display_plane(obj); > fail_locked: > + intel_runtime_pm_put(dev_priv); > mutex_unlock(&dev->struct_mutex); > fail: > drm_gem_object_unreference_unlocked(&obj->base); > --=20 > 2.0.1 >=20 > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx --=20 Ville Syrj=E4l=E4 Intel OTC