From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH 1/2] drm/i915: fix panel unlock register mask
Date: Thu, 21 Aug 2014 16:39:00 +0300
Message-ID: <20140821133859.GN4193@intel.com>
References: <1408622786-19318-1-git-send-email-jani.nikula@intel.com>
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To: Jani Nikula <jani.nikula@intel.com>
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On Thu, Aug 21, 2014 at 03:06:25PM +0300, Jani Nikula wrote:
> Use the correct mask for the unlock bits. In theory this could have lead
> to incorrect asserts but this is unlikely in practise.
> =

> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> =

> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/=
intel_display.c
> index 0b327ebb2d9e..fe1d00dc9ef5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1208,7 +1208,7 @@ static void assert_panel_unlocked(struct drm_i915_p=
rivate *dev_priv,
>  =

>  	val =3D I915_READ(pp_reg);
>  	if (!(val & PANEL_POWER_ON) ||
> -	    ((val & PANEL_UNLOCK_REGS) =3D=3D PANEL_UNLOCK_REGS))
> +	    ((val & PANEL_UNLOCK_MASK) =3D=3D PANEL_UNLOCK_REGS))
>  		locked =3D false;
>  =

>  	if (I915_READ(lvds_reg) & LVDS_PIPEB_SELECT)
> -- =

> 1.9.1
> =

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-- =

Ville Syrj=E4l=E4
Intel OTC