From mboxrd@z Thu Jan  1 00:00:00 1970
From: Damien Lespiau <damien.lespiau@intel.com>
Subject: Re: [PATCH 1/3] drm/i915: call lpt_init_clock_gating on
 BDW too
Date: Thu, 21 Aug 2014 22:50:38 +0100
Message-ID: <20140821215038.GD29975@strange.ger.corp.intel.com>
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To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>, rodrigo.vivi@intel.com
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On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> Because BDW has WPT, which is equivalent to LPT. This is just like the
> CPT/PPT case.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

It'd be probably good to have drm/i915/bdw: in the subject to ease back
porting for product groups, and add those patches to a list someone
maintains (Rodrigo?)

-- 
Damien

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c8f744c..b3e948f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5595,6 +5595,8 @@ static void gen8_init_clock_gating(struct drm_device *dev)
>  	/* Wa4x4STCOptimizationDisable:bdw */
>  	I915_WRITE(CACHE_MODE_1,
>  		   _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
> +
> +	lpt_init_clock_gating(dev);
>  }
>  
>  static void haswell_init_clock_gating(struct drm_device *dev)
> -- 
> 2.0.1
> 
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