From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 02/14] drm/i915: Reorganize vlv eDP reboot notifier Date: Tue, 26 Aug 2014 16:30:22 +0300 Message-ID: <20140826133022.GL4193@intel.com> References: <1408389369-22898-1-git-send-email-ville.syrjala@linux.intel.com> <1408389369-22898-3-git-send-email-ville.syrjala@linux.intel.com> <87egwdhsk8.fsf@intel.com> <20140826125851.GK4193@intel.com> <8761hfl743.fsf@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 50E236E504 for ; Tue, 26 Aug 2014 06:30:27 -0700 (PDT) Content-Disposition: inline In-Reply-To: <8761hfl743.fsf@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Aug 26, 2014 at 04:21:00PM +0300, Jani Nikula wrote: > On Tue, 26 Aug 2014, Ville Syrj=E4l=E4 wr= ote: > > On Tue, Aug 19, 2014 at 10:00:55AM +0300, Jani Nikula wrote: > >> On Mon, 18 Aug 2014, ville.syrjala@linux.intel.com wrote: > >> > From: Ville Syrj=E4l=E4 > >> > > >> > Move the vlv_power_sequencer_pipe() after the IS_VALLEYVIEW() check > >> > and flatten the rest of the function. > >> = > >> Please imagine adding another platform there, and realize this just ad= ds > >> unnecessary churn. > > > > I'd just add another reboot notifier then. > = > Fair enough; it should be vlv_edp_notify_handler then. (No, don't send a > patch to change that! ;) > = > > Frankly I don't understand the current one either. Why does it need to > > set the delay to max for instance? And does this mean that the > > PANEL_POWER_RESET bit doesn't actually work as advertised in the docs? > = > *shrug* experimental evidence? > = > commit 01527b3127997ef6370d5ad4fa25d96847fbf12a > Author: Clint Taylor > Date: Mon Jul 7 13:01:46 2014 -0700 > = > drm/i915/vlv: T12 eDP panel timing enforcement during reboot > = > The panel power sequencer on vlv doesn't appear to accept changes to = its > T12 power down duration during warm reboots. This change forces a del= ay > for warm reboots to the T12 panel timing as defined in the VBT table = for > the connected panel. That explanation doesn't really make it any more clear to me. But if the reboot notifier helps someone somehow I can live with it. -- = Ville Syrj=E4l=E4 Intel OTC