Re: [PATCH 1/2] drm/i915/bdw: Apply workarounds in render ring init function

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Tue, Aug 26, 2014 at 03:47:52PM +0100, Siluvery, Arun wrote:
> On 26/08/2014 15:37, Ville Syrjälä wrote:
> > On Tue, Aug 26, 2014 at 02:44:50PM +0100, Arun Siluvery wrote:
> >> For BDW workarounds are currently initialized in init_clock_gating() but
> >> they are lost during reset, suspend/resume etc; this patch moves the WAs
> >> that are part of register state context to render ring init fn otherwise
> >> default context ends up with incorrect values as they don't get initialized
> >> until init_clock_gating fn.
> >>
> >> v2: Add workarounds to golden render state
> >> This method has its own issues, first of all this is different for
> >> each gen and it is generated using a tool so adding new workaround
> >> and mainitaining them across gens is not a straightforward process.
> >>
> >> v3: Use LRIs to emit these workarounds (Ville)
> >> Instead of modifying the golden render state the same LRIs are
> >> emitted from within the driver.
> >>
> >> v4: Use abstract name when exporting gen specific routines (Chris)
> >>
> >> For: VIZ-4092
> >> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
> >
> > This one looks good as far as I'm concerned.
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Do you plan to give other platforms the same treatment? We need at least
> > CHV converted ASAP. But if you don't have a test machine I can take care
> > of that myself.
> >
> I don't have hardware for CHV, I can borrow and try to do but since it 
> is required at the earliest could you please modify it for CHV?

Sure, I can take care of it.

-- 
Ville Syrjälä
Intel OTC