From: Daniel Vetter <daniel@ffwll.ch>
To: Damien Lespiau <damien.lespiau@intel.com>
Cc: rodrigo.vivi@intel.com, intel-gfx@lists.freedesktop.org,
Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 1/3] drm/i915: call lpt_init_clock_gating on BDW too
Date: Tue, 26 Aug 2014 19:16:34 +0200 [thread overview]
Message-ID: <20140826171634.GE15520@phenom.ffwll.local> (raw)
In-Reply-To: <20140821215038.GD29975@strange.ger.corp.intel.com>
On Thu, Aug 21, 2014 at 10:50:38PM +0100, Damien Lespiau wrote:
> On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > Because BDW has WPT, which is equivalent to LPT. This is just like the
> > CPT/PPT case.
> >
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> It'd be probably good to have drm/i915/bdw: in the subject to ease back
> porting for product groups, and add those patches to a list someone
> maintains (Rodrigo?)
Forgotten your r-b tag or intentionally left blank?
-Daniel
>
> --
> Damien
>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index c8f744c..b3e948f 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5595,6 +5595,8 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> > /* Wa4x4STCOptimizationDisable:bdw */
> > I915_WRITE(CACHE_MODE_1,
> > _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
> > +
> > + lpt_init_clock_gating(dev);
> > }
> >
> > static void haswell_init_clock_gating(struct drm_device *dev)
> > --
> > 2.0.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-08-26 17:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-21 20:09 [PATCH 1/3] drm/i915: call lpt_init_clock_gating on BDW too Paulo Zanoni
2014-08-21 20:09 ` [PATCH 2/3] drm/i915: rename gen8_init_clock_gating to broadwell_init_clock_gating Paulo Zanoni
2014-08-21 21:45 ` Damien Lespiau
2014-08-21 20:09 ` [PATCH 3/3] drm/i915: send PCI_D3hot adapter opregion message on BDW RPM suspend Paulo Zanoni
2014-08-21 21:47 ` Damien Lespiau
2014-08-26 21:06 ` Daniel Vetter
2014-08-21 21:41 ` [PATCH 1/3] drm/i915: call lpt_init_clock_gating on BDW too Damien Lespiau
2014-08-21 21:50 ` Damien Lespiau
2014-08-26 17:16 ` Daniel Vetter [this message]
2014-08-26 17:24 ` Damien Lespiau
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