From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: change CHV write_eld/global_resources function pointers Date: Wed, 3 Sep 2014 11:52:43 +0300 Message-ID: <20140903085243.GS4193@intel.com> References: <1409687637-373-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 171A86E4E5 for ; Wed, 3 Sep 2014 01:52:48 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1409687637-373-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Tue, Sep 02, 2014 at 04:53:57PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > = > Currently, CHV is using the same functions as HSW/BDW instead of the > same functions as VLV. This looks wrong, especially since, for > example, valleyview_modeset_global_resouces even has an IS_CHERRYVIEW > check. > = > This patch has the potential to fix display audio and the CHV CDCLK. > = > Cc: Ville Syrj=E4l=E4 > Signed-off-by: Paulo Zanoni Whoops. These things seem to slip through a lot. I can imediately spot another IS_GEN8 fumble with intel_frontbuffer_flush(). Anyway this patch is: Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > = > = > This is completely untested! But maybe it should go to fixes/stable. Yes. -fixes at least so we get it into 3.17. I'll spin it up on my bsw and make sure it doesn't explode in some unforseen way. > = > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index c092ff4..e6cae59 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -12550,7 +12550,7 @@ static void intel_init_display(struct drm_device = *dev) > dev_priv->display.write_eld =3D ironlake_write_eld; > dev_priv->display.modeset_global_resources =3D > ivb_modeset_global_resources; > - } else if (IS_HASWELL(dev) || IS_GEN8(dev)) { > + } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { > dev_priv->display.fdi_link_train =3D hsw_fdi_link_train; > dev_priv->display.write_eld =3D haswell_write_eld; > dev_priv->display.modeset_global_resources =3D > -- = > 2.1.0 -- = Ville Syrj=E4l=E4 Intel OTC