From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Thomas Richter <richter@rus.uni-stuttgart.de>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Limit the watermark to at least 8 entries on gen2/3
Date: Sat, 6 Sep 2014 20:33:02 +0300 [thread overview]
Message-ID: <20140906173301.GV4193@intel.com> (raw)
In-Reply-To: <540A08EF.7020105@rus.uni-stuttgart.de>
On Fri, Sep 05, 2014 at 09:03:11PM +0200, Thomas Richter wrote:
> On 05.09.2014 20:54, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > 830 is very unhappy of the watermark value is too low (indicating a very
> > high watermark in fact, ie. memory fetch will occur with an almost full
> > FIFO). Limit the watermark value to at least 8 cache lines.
> >
> > That also matches the burst size we use on most platforms. BSpec seems
> > to indicate we should limit the watermark to 'burst size + 1'. But on
> > gen4 we already use a hardcoded 8 as the watermark value (as the spec
> > says we should), so just use 8 as the limit on gen2/3 as well.
>
> /* snip */
>
> That's certainly one way to fix it. Nothing against it. It might be more
> conservative to make this fix only in the calling context of the 830 and
> 845 specific functions as I don't know whether the other chipsets have
> similar issues. I.e. one level up in the call-chain.
>
> This being said, I can certainly confirm that the suggested modification
> works on i830.
>
> One way or another, it seems to me that drm-intel-nightly which I pulled
> had a couple of more serious issues. I didn't even get X running, and
> monitor detection did not seem to work reliable, too. I had the same
> kind of instability on the external monitor for the console Ville's
> patches fixed so nicely, so it seems to me that there is something else
> that is missing. The new DVO code was definitely there, I checked that.
The DVO 2x clock fix was missing. I posted a new version. But I think
that should only affect the DVO output and not the VGA output. Anyway on
my 830 nightly with those two patches is pretty damn good. I'm going to
assume this is the first time in history when 830 works properly in linux
(well, excluding all the features we still haven't even implemented in
the driver). Only took 14 years or so to get there :P
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2014-09-06 17:33 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-14 22:21 [PATCH 00/16] drm/i915: 830M/ns201 fixes again ville.syrjala
2014-08-14 22:21 ` [PATCH 01/16] drm/i915: Fix gen2 planes B and C max watermark value ville.syrjala
2014-08-15 13:25 ` Thomas Richter
2014-08-14 22:21 ` [PATCH 02/16] drm/i915: Disable trickle feed for gen2/3 ville.syrjala
2014-08-14 22:21 ` [PATCH 03/16] drm/i915: Idle unused rings on gen2/3 during init/resume ville.syrjala
2014-08-14 22:21 ` [PATCH 04/16] drm/i915: Pass intel_crtc to intel_disable_pipe() and intel_wait_for_pipe_off() ville.syrjala
2014-08-15 13:27 ` Thomas Richter
2014-08-14 22:21 ` [PATCH v3 05/16] drm/i915: Disable double wide even when leaving the pipe on ville.syrjala
2014-08-15 13:28 ` Thomas Richter
2014-08-14 22:21 ` [PATCH 06/16] drm/i915: ns2501 is on DVOB ville.syrjala
2014-08-15 13:29 ` Thomas Richter
2014-08-14 22:21 ` [PATCH 07/16] drm/i915: Enable DVO between mode_set and dpms hooks ville.syrjala
2014-08-15 13:29 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 08/16] drm/i915: Don't call DVO mode_set hook on DPMS changes ville.syrjala
2014-08-15 13:30 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 09/16] drm/i915: Kill useless ns2501_dump_regs ville.syrjala
2014-08-15 13:08 ` Thomas Richter
2014-08-15 13:31 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 10/16] drm/i915: Rewrite ns2501 driver a bit ville.syrjala
2014-08-15 13:13 ` Thomas Richter
2014-08-15 13:32 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 11/16] drm/i915: Init important ns2501 registers ville.syrjala
2014-08-15 13:18 ` Thomas Richter
2014-08-15 13:33 ` Thomas Richter
2014-09-01 8:42 ` Daniel Vetter
2014-08-14 22:22 ` [PATCH 12/16] drm/i915: Check pixel clock in ns2501 mode_valid hook ville.syrjala
2014-08-15 13:19 ` Thomas Richter
2014-08-15 13:33 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 13/16] drm/i915: Fix DVO 2x clock enable on 830M ville.syrjala
2014-08-15 13:34 ` Thomas Richter
2014-09-01 8:46 ` Daniel Vetter
2014-09-05 18:52 ` [PATCH v2 " ville.syrjala
2014-09-08 7:33 ` Daniel Vetter
2014-08-14 22:22 ` [PATCH 14/16] Revert "drm/i915: Nuke pipe A quirk on i830M" ville.syrjala
2014-08-15 13:36 ` Thomas Richter
2014-08-14 22:22 ` [PATCH v2 15/16] drm/i915: Add pipe B force quirk for 830M ville.syrjala
2014-08-15 13:37 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 16/16] drm/i915: Preserve VGACNTR bits from the BIOS ville.syrjala
2014-08-15 13:39 ` Thomas Richter
2014-08-15 7:57 ` [PATCH 00/16] drm/i915: 830M/ns201 fixes again Ville Syrjälä
[not found] ` <53EE59E8.7030101@rus.uni-stuttgart.de>
[not found] ` <20140816181342.GU4193@intel.com>
2014-08-16 18:25 ` S6010 - brightness adjustment not available Thomas Richter
2014-08-16 20:34 ` Ville Syrjälä
2014-09-01 8:53 ` [PATCH 00/16] drm/i915: 830M/ns201 fixes again Daniel Vetter
2014-09-05 18:54 ` [PATCH] drm/i915: Limit the watermark to at least 8 entries on gen2/3 ville.syrjala
2014-09-05 19:03 ` Thomas Richter
2014-09-06 17:33 ` Ville Syrjälä [this message]
2014-09-06 17:50 ` Thomas Richter
2014-09-08 7:39 ` Daniel Vetter
2014-09-08 7:41 ` Thomas Richter
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