From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH] drm/i915: Limit the watermark to at least 8
 entries on gen2/3
Date: Mon, 8 Sep 2014 09:39:03 +0200
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To: ville.syrjala@linux.intel.com
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On Fri, Sep 05, 2014 at 09:54:13PM +0300, ville.syrjala@linux.intel.com wro=
te:
> From: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> =

> 830 is very unhappy of the watermark value is too low (indicating a very
> high watermark in fact, ie. memory fetch will occur with an almost full
> FIFO). Limit the watermark value to at least 8 cache lines.
> =

> That also matches the burst size we use on most platforms. BSpec seems
> to indicate we should limit the watermark to 'burst size + 1'. But on
> gen4 we already use a hardcoded 8 as the watermark value (as the spec
> says we should), so just use 8 as the limit on gen2/3 as well.
> =

> Signed-off-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>

Queued for -next, thanks for the patch. And since this goes in through
-next the potential risk to other platforms is imo manageable. And we've
had other people complaint about serious underrun troubles on e.g.
underpowered i915gm atoms with big screens. Maybe this helps there like
for the i830m.
-Daniel
-- =

Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch