From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 1/4] drm/i915: Increase PSR Idle Frame to 2.
Date: Mon, 15 Sep 2014 11:08:40 +0200
Message-ID: <20140915090840.GM4740@phenom.ffwll.local>
References: <1409798999-1809-1-git-send-email-rodrigo.vivi@intel.com>
 <20140904092253.GD15520@phenom.ffwll.local>
 <CABVU7+uxcsXipRYLE6TGgi7swnmujG5Cz9PfSFGLHQizidrVtQ@mail.gmail.com>
 <CAKMK7uGjwYn58PK6ut1oBsoK+bc16dokiqqAS2YsyL4MKxW5yA@mail.gmail.com>
 <CABVU7+u0f3twqqYkT2NH8Z_L4xEmfh6FcW5A6AVawSsdnBFsvw@mail.gmail.com>
 <CAKMK7uE6OfXsZtuvppHpwqzm-ymFFjn_WiEbN9+u0J1ew9EKdg@mail.gmail.com>
 <CABVU7+tkntcoQjfN_9rCtY3U_mjFThheA4V8Yz8e9zC1vawxvw@mail.gmail.com>
 <20140905083715.GE15520@phenom.ffwll.local>
 <CABVU7+vUqzFBSAnNs_Ox1MU=SwON+MCA5fEgD_wB2_S35gyP-Q@mail.gmail.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from mail-we0-f169.google.com (mail-we0-f169.google.com
 [74.125.82.169])
 by gabe.freedesktop.org (Postfix) with ESMTP id 5BDD96E2D6
 for <intel-gfx@lists.freedesktop.org>; Mon, 15 Sep 2014 02:08:13 -0700 (PDT)
Received: by mail-we0-f169.google.com with SMTP id w61so3602800wes.14
 for <intel-gfx@lists.freedesktop.org>; Mon, 15 Sep 2014 02:08:12 -0700 (PDT)
Content-Disposition: inline
In-Reply-To: <CABVU7+vUqzFBSAnNs_Ox1MU=SwON+MCA5fEgD_wB2_S35gyP-Q@mail.gmail.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>, Rodrigo Vivi <rodrigo.vivi@intel.com>
List-Id: intel-gfx@lists.freedesktop.org

On Fri, Sep 12, 2014 at 05:29:44PM -0700, Rodrigo Vivi wrote:
> Please ignore this full series here.
> 
> I have a better one that let PSR on HSW in a better stage with only 1 idle
> frame and without changing the 100ms. Actually if we are brave we can
> reduce this to 24 or less. The new work is currently under
> http://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=psr-3.18
> However I'm not going to send yet because on BDW it got works. It seems BDW
> doesn't like to get PSR enabled immediatelly. So I'm justs sendint new
> series after I'm confortable that PSR is in a better stage for both HSW and
> BDW.

How does this interact with the improved psr crc capture code? And if we
aim for perfect we should be able to get the delay for the reenable for
down to 0. 24ms is still about 1.5 frames ...

But sounding much better indeed now, nice work!
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch