Re: [PATCH 2/8] drm/i915: Adds graphic address space ballooning logic

[Daniel Vetter <daniel@ffwll.ch>]

On Fri, Sep 19, 2014 at 09:05:57AM +0100, Chris Wilson wrote:
> On Sat, Sep 20, 2014 at 02:47:02AM +0800, Jike Song wrote:
> > From: Yu Zhang <yu.c.zhang@intel.com>
> > If all entries may have prefetch issues,
> > then this special guard page is necessary, to protect unexpected
> > accesses into GTT entries partitioned out by other VMs. Otherwise,
> > we may only need one guard page at the end of the physical GTT space.
> 
> I am a bit dubious how this works when userspace still believes that it
> can access the whole mappable aperture, and then how every driver
> attempts to pin its own planes, rings and whatnot (since it still
> believes that it is talking to the actual hardware and that the hardware
> requires access to its virtual address). The host should be able to move the
> ranges around in order to accommodate userspace in any particular guest
> (hence a balloon interface I presume). But I don't see how that is
> possible, and you don't explain it either.

Yeah this is something we need to fix, either by pimping i915 fault
support to be able to split up a big bo into chunks, or by telling
userspace about the massively reduced contiguous mapping size. It should
be tracked somewhere as a todo task ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch