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From: Daniel Vetter <daniel@ffwll.ch>
To: Jike Song <jike.song@intel.com>
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/8] drm/i915: Add the display switch logic for vgpu in i915 driver
Date: Fri, 19 Sep 2014 18:09:37 +0200	[thread overview]
Message-ID: <20140919160937.GP15734@phenom.ffwll.local> (raw)
In-Reply-To: <1411152428-7226-6-git-send-email-jike.song@intel.com>

On Sat, Sep 20, 2014 at 02:47:05AM +0800, Jike Song wrote:
> From: Yu Zhang <yu.c.zhang@intel.com>
> 
> Display switch logic is added to notify the vgt mediator that
> current vgpu have a valid surface to show. It does so by writing
> the display_ready field in PV INFO page, and then will be handled
> in vgt mediator. This is useful to avoid trickiness when the VM's
> framebuffer is being accessed in the middle of VM modesetting,
> e.g. compositing the framebuffer in the host side
> 
> Signed-off-by: Yu Zhang <yu.c.zhang@intel.com>
> Signed-off-by: Jike Song <jike.song@intel.com>
> Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_dma.c      |  8 ++++++++
>  drivers/gpu/drm/i915/i915_reg.h      |  7 +++++++
>  drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++
>  3 files changed, 25 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index bb4ad52..d9462e1 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1790,6 +1790,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>  	} else {
>  		/* Start out suspended in ums mode. */
>  		dev_priv->ums.mm_suspended = 1;
> +		if (intel_vgpu_active(dev)) {
> +			/*
> +			 * Notify a valid surface after modesetting,
> +			 * when running inside a VM.
> +			 */
> +			I915_WRITE(vgt_info_off(display_ready),
> +				VGT_DRV_DISPLAY_READY);
> +		}
>  	}
>  
>  	i915_setup_sysfs(dev);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a70f12e..38d606c 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6673,5 +6673,12 @@ enum punit_power_well {
>  #define vgt_info_off(x) \
>  	(VGT_PVINFO_PAGE + (long)&((struct vgt_if *) NULL)->x)
>  
> +/*
> + * The information set by the guest gfx driver, through the display_ready field
> + */
> +enum vgt_display_status {
> +	VGT_DRV_DISPLAY_NOT_READY = 0,
> +	VGT_DRV_DISPLAY_READY,	/* ready for display switch */
> +};
>  
>  #endif /* _I915_REG_H_ */
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b78f00a..3af9259 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11642,6 +11642,16 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
>  			intel_modeset_check_state(set->crtc->dev);
>  	}
>  
> +	if (intel_vgpu_active(dev)) {
> +		/*
> +		 * Notify a valid surface after modesetting,
> +		 * when running inside a VM.
> +		 */
> +		struct drm_i915_private *dev_priv = dev->dev_private;
> +
> +		I915_WRITE(vgt_info_off(display_ready), VGT_DRV_DISPLAY_READY);
> +	}

Since very shortly we now have the frontbuffer tracking support code.
Should we move it there? See intel_frontbuffer_flush&flip.
-Daniel

> +
>  	if (ret) {
>  		DRM_DEBUG_KMS("failed to set mode on [CRTC:%d], err = %d\n",
>  			      set->crtc->base.id, ret);
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  parent reply	other threads:[~2014-09-19 16:09 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-19 18:47 [PATCH 0/8] Add enlightenments for vGPU Jike Song
2014-09-19 18:47 ` [PATCH 1/8] drm/i915: Introduce a PV INFO page structure for Intel GVT-g Jike Song
2014-09-19  7:25   ` Chris Wilson
2014-09-19 10:23     ` Jike Song
2014-09-29 11:44     ` Jike Song
2014-09-29 12:08       ` Yu, Zhang
2014-09-29 12:16       ` Chris Wilson
2014-09-29 12:40         ` Jike Song
2014-10-10  8:23           ` Yu, Zhang
2014-09-19 16:02   ` Daniel Vetter
2014-09-19 16:07     ` Daniel Vetter
2014-09-19 21:39     ` Tian, Kevin
2014-09-19 18:47 ` [PATCH 2/8] drm/i915: Adds graphic address space ballooning logic Jike Song
2014-09-19  8:05   ` Chris Wilson
2014-09-19 16:04     ` Daniel Vetter
2014-09-19 18:21     ` Tian, Kevin
2014-09-19 20:00       ` Chris Wilson
2014-09-23  8:26         ` Daniel Vetter
2014-09-23  9:19           ` Chris Wilson
2014-09-23 11:25             ` Daniel Vetter
2014-09-24 12:35               ` Zhang, Yu
2014-09-24 13:21                 ` Chris Wilson
2014-09-26  8:26                   ` Zhang, Yu
2014-09-26  8:48                     ` Chris Wilson
2014-09-26  8:46                       ` Yu, Zhang
2014-09-24 13:23                 ` Daniel Vetter
2014-09-19 18:47 ` [PATCH 3/8] drm/i915: Partition the fence registers for vgpu in i915 driver Jike Song
2014-09-19 18:47 ` [PATCH 4/8] drm/i915: Disable framebuffer compression for i915 driver in VM Jike Song
2014-09-19  8:07   ` Chris Wilson
2014-09-22  7:10     ` Jike Song
2014-09-22 11:28       ` Chris Wilson
2014-09-19 18:47 ` [PATCH 5/8] drm/i915: Add the display switch logic for vgpu in i915 driver Jike Song
2014-09-19  8:14   ` Chris Wilson
2014-09-19 11:37     ` Wang, Zhi A
2014-09-19 16:09   ` Daniel Vetter [this message]
2014-09-29  6:31     ` Zhiyuan Lv
2014-09-29 12:30       ` Daniel Vetter
2014-09-30 10:25         ` Zhiyuan Lv
2014-09-30 10:56           ` Daniel Vetter
2014-09-19 18:47 ` [PATCH 6/8] drm/i915: Disable power management for i915 driver in VM Jike Song
2014-09-19  8:16   ` Chris Wilson
2014-09-19 18:47 ` [PATCH 7/8] drm/i915: Create vgpu specific write MMIO to reduce traps Jike Song
2014-09-19  6:59   ` Chris Wilson
2014-09-19  7:43     ` Jike Song
2014-09-19 18:47 ` [PATCH 8/8] drm/i915: Support alias ppgtt in VM if ppgtt is enabled Jike Song
2014-09-19  8:25   ` Chris Wilson
2014-09-22 11:17     ` Jike Song
2014-09-22 11:27       ` Chris Wilson

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