From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: WaRsClearFWBitsAtReset - WA for blitter, render and media forcewake on BDW and GEN9 platforms. Date: Tue, 23 Sep 2014 10:30:35 +0300 Message-ID: <20140923073035.GW12416@intel.com> References: <1411411382-4949-1-git-send-email-suketu.j.shah@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 248076E11A for ; Tue, 23 Sep 2014 00:30:39 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1411411382-4949-1-git-send-email-suketu.j.shah@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Suketu Shah Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Sep 22, 2014 at 02:43:02PM -0400, Suketu Shah wrote: > The newly loaded Gfx driver must first initialize the forcewake request r= egister > for render, media and blitter engines by clearing all forcewake bits (0xF= FFF0000). > This applies to BDW and GEN9 platforms. Already done intel_uncore_init()->intel_uncore_early_sanitize()->intel_uncore_forcewake_= reset() > = > Change-Id: I633c530340a5918c084249a188d0397ed4f51a41 > Signed-off-by: Suketu Shah > --- > drivers/gpu/drm/i915/intel_uncore.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > = > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/i= ntel_uncore.c > index c9bf39e..9d94497 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1345,6 +1345,14 @@ void intel_uncore_init(struct drm_device *dev) > dev_priv->uncore.funcs.mmio_readq =3D gen4_read64; > break; > } > + > + /* WaRsClearFWBitsAtReset: The newly loaded Gfx driver must first initi= alize the > + * forcewake request register for render, media and blitter engines by= clearing > + * all forcewake bits (0xFFFF0000) on resets. > + * This applies to BDW and Gen9 platforms. > + */ > + if (IS_BROADWELL(dev) || IS_GEN9(dev)) > + intel_uncore_forcewake_reset(dev, false); > } > = > void intel_uncore_fini(struct drm_device *dev) > -- = > 2.1.0 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC