From: Daniel Vetter <daniel@ffwll.ch>
To: Jacek Danecki <jacek.danecki@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATH] Correct GPU timestamp read
Date: Tue, 23 Sep 2014 10:37:27 +0200 [thread overview]
Message-ID: <20140923083726.GY15734@phenom.ffwll.local> (raw)
In-Reply-To: <54204CDD.9000706@intel.com>
On Mon, Sep 22, 2014 at 06:22:53PM +0200, Jacek Danecki wrote:
> Current implementation of reading GPU timestamp is broken.
> It returns lower 32 bits shifted by 32 bits (XXXXXXXX00000000 instead of YYYYYYYYXXXXXXXX).
> Below change is adding possibility to read hi part of that register separately.
>
> Signed-off-by: Jacek Danecki jacek.danecki@intel.com
Needs to come with corresponding userspace using this.
-Daniel
> ---
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 20673cc..5c87d92 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1089,6 +1089,7 @@ enum punit_power_well {
> #define RING_IMR(base) ((base)+0xa8)
> #define RING_HWSTAM(base) ((base)+0x98)
> #define RING_TIMESTAMP(base) ((base)+0x358)
> +#define RING_TIMESTAMP_HI(base) ((base)+0x35C)
> #define TAIL_ADDR 0x001FFFF8
> #define HEAD_WRAP_COUNT 0xFFE00000
> #define HEAD_WRAP_ONE 0x00200000
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index e81bc3b..6fa4c86 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -969,6 +969,7 @@ static const struct register_whitelist {
> uint32_t gen_bitmask;
> } whitelist[] = {
> { RING_TIMESTAMP(RENDER_RING_BASE), 8, GEN_RANGE(4, 8) },
> + { RING_TIMESTAMP_HI(RENDER_RING_BASE), 4, GEN_RANGE(4, 8) },
> };
>
> int i915_reg_read_ioctl(struct drm_device *dev,
> -- 1.8.3.1
>
> --
> jacek
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-09-23 8:37 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-22 16:22 [PATH] Correct GPU timestamp read Jacek Danecki
2014-09-23 8:37 ` Daniel Vetter [this message]
2014-09-23 17:12 ` Jacek Danecki
2014-09-25 12:26 ` Chris Wilson
2014-09-25 13:00 ` Jacek Danecki
2014-09-25 13:09 ` Chris Wilson
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