From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 2/4] drm/i915: PSR: Organize PSR enable function Date: Wed, 24 Sep 2014 10:37:23 +0200 Message-ID: <20140924083723.GL15734@phenom.ffwll.local> References: <1410909548-4945-1-git-send-email-rodrigo.vivi@intel.com> <1410909548-4945-2-git-send-email-rodrigo.vivi@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f47.google.com (mail-wg0-f47.google.com [74.125.82.47]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F1E46E0FC for ; Wed, 24 Sep 2014 01:37:28 -0700 (PDT) Received: by mail-wg0-f47.google.com with SMTP id y10so5989581wgg.6 for ; Wed, 24 Sep 2014 01:37:27 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Paulo Zanoni Cc: Intel Graphics Development , Rodrigo Vivi List-Id: intel-gfx@lists.freedesktop.org On Tue, Sep 23, 2014 at 06:05:21PM -0300, Paulo Zanoni wrote: > 2014-09-16 20:19 GMT-03:00 Rodrigo Vivi : > > We don't need to setup everything else if it doesn't match all conditions. > > Reviewed-by: Paulo Zanoni Merged the first two patches to dinq. -Daniel > > > > > Signed-off-by: Rodrigo Vivi > > --- > > drivers/gpu/drm/i915/intel_dp.c | 10 ++++++---- > > 1 file changed, 6 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 271788e..168b3c3 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -1912,10 +1912,12 @@ void intel_edp_psr_enable(struct intel_dp *intel_dp) > > mutex_lock(&dev_priv->psr.lock); > > if (dev_priv->psr.enabled) { > > DRM_DEBUG_KMS("PSR already in use\n"); > > - mutex_unlock(&dev_priv->psr.lock); > > - return; > > + goto unlock; > > } > > > > + if (!intel_edp_psr_match_conditions(intel_dp)) > > + goto unlock; > > + > > dev_priv->psr.busy_frontbuffer_bits = 0; > > > > intel_edp_psr_setup_vsc(intel_dp); > > @@ -1924,8 +1926,8 @@ void intel_edp_psr_enable(struct intel_dp *intel_dp) > > I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | > > EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); > > > > - if (intel_edp_psr_match_conditions(intel_dp)) > > - dev_priv->psr.enabled = intel_dp; > > + dev_priv->psr.enabled = intel_dp; > > +unlock: > > mutex_unlock(&dev_priv->psr.lock); > > } > > > > -- > > 1.9.3 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Paulo Zanoni > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch