From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH v2] drm/i915: De-magic the PSR AUX message Date: Thu, 2 Oct 2014 09:42:50 +0200 Message-ID: <20141002074250.GS12343@phenom.ffwll.local> References: <1410355025-15917-1-git-send-email-ville.syrjala@linux.intel.com> <1412171816-32659-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-wi0-f173.google.com (mail-wi0-f173.google.com [209.85.212.173]) by gabe.freedesktop.org (Postfix) with ESMTP id CEF056E445 for ; Thu, 2 Oct 2014 00:42:54 -0700 (PDT) Received: by mail-wi0-f173.google.com with SMTP id bs8so2995279wib.12 for ; Thu, 02 Oct 2014 00:42:53 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1412171816-32659-1-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Oct 01, 2014 at 04:56:56PM +0300, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > Use pack_aux() to construct the PSR exit DPMS D0 AUX message, > and use the defines from dp_dp_helper.h to populate the message > contents. > = > v2: Use sizeof() for message size (Jani) > Use a generic loop to write EDP_PSR_AUX_DATA registers > = > Cc: Jani Nikula > Cc: Rodrigo Vivi > Signed-off-by: Ville Syrj=E4l=E4 Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_reg.h | 2 -- > drivers/gpu/drm/i915/intel_dp.c | 21 ++++++++++++++++----- > 2 files changed, 16 insertions(+), 7 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index 2e0eb16..09c4af3 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2506,9 +2506,7 @@ enum punit_power_well { > = > #define EDP_PSR_AUX_CTL(dev) (EDP_PSR_BASE(dev) + 0x10) > #define EDP_PSR_AUX_DATA1(dev) (EDP_PSR_BASE(dev) + 0x14) > -#define EDP_PSR_DPCD_COMMAND 0x80060000 > #define EDP_PSR_AUX_DATA2(dev) (EDP_PSR_BASE(dev) + 0x18) > -#define EDP_PSR_DPCD_NORMAL_OPERATION (1<<24) > #define EDP_PSR_AUX_DATA3(dev) (EDP_PSR_BASE(dev) + 0x1c) > #define EDP_PSR_AUX_DATA4(dev) (EDP_PSR_BASE(dev) + 0x20) > #define EDP_PSR_AUX_DATA5(dev) (EDP_PSR_BASE(dev) + 0x24) > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel= _dp.c > index ad4eb6d..76317ad 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -225,7 +225,7 @@ intel_dp_mode_valid(struct drm_connector *connector, > } > = > static uint32_t > -pack_aux(uint8_t *src, int src_bytes) > +pack_aux(const uint8_t *src, int src_bytes) > { > int i; > uint32_t v =3D 0; > @@ -2049,8 +2049,17 @@ static void intel_edp_psr_enable_sink(struct intel= _dp *intel_dp) > struct drm_i915_private *dev_priv =3D dev->dev_private; > uint32_t aux_clock_divider; > int precharge =3D 0x3; > - int msg_size =3D 5; /* Header(4) + Message(1) */ > bool only_standby =3D false; > + static const uint8_t aux_msg[] =3D { > + [0] =3D DP_AUX_NATIVE_WRITE << 4, > + [1] =3D DP_SET_POWER >> 8, > + [2] =3D DP_SET_POWER & 0xff, > + [3] =3D 1 - 1, > + [4] =3D DP_SET_POWER_D0, > + }; > + int i; > + > + BUILD_BUG_ON(sizeof(aux_msg) > 20); > = > aux_clock_divider =3D intel_dp->get_aux_clock_divider(intel_dp, 0); > = > @@ -2066,11 +2075,13 @@ static void intel_edp_psr_enable_sink(struct inte= l_dp *intel_dp) > DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE); > = > /* Setup AUX registers */ > - I915_WRITE(EDP_PSR_AUX_DATA1(dev), EDP_PSR_DPCD_COMMAND); > - I915_WRITE(EDP_PSR_AUX_DATA2(dev), EDP_PSR_DPCD_NORMAL_OPERATION); > + for (i =3D 0; i < sizeof(aux_msg); i +=3D 4) > + I915_WRITE(EDP_PSR_AUX_DATA1(dev) + i, > + pack_aux(&aux_msg[i], sizeof(aux_msg) - i)); > + > I915_WRITE(EDP_PSR_AUX_CTL(dev), > DP_AUX_CH_CTL_TIME_OUT_400us | > - (msg_size << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | > + (sizeof(aux_msg) << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | > (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) | > (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT)); > } > -- = > 1.8.5.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch