From mboxrd@z Thu Jan 1 00:00:00 1970 From: Damien Lespiau Subject: Re: limiting modes on 4k monitors on Haswell ULT Date: Thu, 2 Oct 2014 12:15:03 +0100 Message-ID: <20141002111503.GA1845@strange.config> References: <20141002080050.GU12343@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 02F756E3BF for ; Thu, 2 Oct 2014 04:15:06 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20141002080050.GU12343@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter Cc: "intel-gfx@lists.freedesktop.org" List-Id: intel-gfx@lists.freedesktop.org On Thu, Oct 02, 2014 at 10:00:50AM +0200, Daniel Vetter wrote: > On Thu, Oct 02, 2014 at 01:30:48PM +1000, Dave Airlie wrote: > > Hey guys, > > > > so I have a haswell ULT laptop (lenovo t440s), and got access to a > > Samsung single panel 4k monitor (no MST). > > > > Now we detect the monitor fine, but unfortunately the ULT hsw can't > > run it over DP, as it has clock limits in place. However we still > > offer the 60hz mode and we pick it by default, ensuing black screens. > > > > I've tested the same monitor with a haswell in a t540p and it works > > fine due to having the higher limits in place. > > We have the IS_HSW_ULX check in intel_dp_max_link_bw, and that's used by > both compute_config and mode_valid. So it should work, and from a quick > look I don't see any bugs. But obviously something is busted. Just to be a bit more specific: ULT != ULX, the two SKUs have different limits. The test in intel_dp_max_link_bw() is about eDP/DP max link rate: HBR2(ULT) Vs HBR(ULX). I'd go with Ville, that sounds like CDCLK is the limiting factor, and we're missing these checks. From a cursory glance, it doesn't seem we can do 4k on ULT. -- Damien