From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [RFC 13/21] drm/i915: Convert mmio_flip::seqno to struct request Date: Sun, 19 Oct 2014 15:07:22 +0200 Message-ID: <20141019130722.GZ26941@phenom.ffwll.local> References: <1412604925-11290-5-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-6-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-7-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-8-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-9-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-10-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-11-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-12-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-13-git-send-email-John.C.Harrison@Intel.com> <1412604925-11290-14-git-send-email-John.C.Harrison@Intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f44.google.com (mail-wg0-f44.google.com [74.125.82.44]) by gabe.freedesktop.org (Postfix) with ESMTP id EDF056E071 for ; Sun, 19 Oct 2014 06:07:14 -0700 (PDT) Received: by mail-wg0-f44.google.com with SMTP id y10so3656818wgg.15 for ; Sun, 19 Oct 2014 06:07:14 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1412604925-11290-14-git-send-email-John.C.Harrison@Intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: John.C.Harrison@Intel.com Cc: Intel-GFX@Lists.FreeDesktop.Org List-Id: intel-gfx@lists.freedesktop.org On Mon, Oct 06, 2014 at 03:15:17PM +0100, John.C.Harrison@Intel.com wrote: > From: John Harrison Again on the topic of thin commit messages: Beyond the boilerplate blabla explaining why we do all the s/seqno/request/ stuff for the benefit of the future reader this definitely needs a mention of the refcounting needed for the async work. -Daniel > > For: VIZ-4377 > Signed-off-by: John.C.Harrison@Intel.com > --- > drivers/gpu/drm/i915/intel_display.c | 12 +++++++----- > drivers/gpu/drm/i915/intel_drv.h | 2 +- > 2 files changed, 8 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 2af421e..f13bc30 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9799,15 +9799,16 @@ void intel_notify_mmio_flip(struct intel_engine_cs *ring) > struct intel_mmio_flip *mmio_flip; > > mmio_flip = &intel_crtc->mmio_flip; > - if (mmio_flip->seqno == 0) > + if (mmio_flip->req == NULL) > continue; > > if (ring->id != mmio_flip->ring_id) > continue; > > - if (i915_seqno_passed(seqno, mmio_flip->seqno)) { > + if (i915_seqno_passed(seqno, i915_gem_request_get_seqno(mmio_flip->req))) { > intel_do_mmio_flip(intel_crtc); > - mmio_flip->seqno = 0; > + i915_gem_request_unreference(mmio_flip->req); > + mmio_flip->req = NULL; > ring->irq_put(ring); > } > } > @@ -9826,7 +9827,7 @@ static int intel_queue_mmio_flip(struct drm_device *dev, > unsigned long irq_flags; > int ret; > > - if (WARN_ON(intel_crtc->mmio_flip.seqno)) > + if (WARN_ON(intel_crtc->mmio_flip.req)) > return -EBUSY; > > ret = intel_postpone_flip(obj); > @@ -9838,7 +9839,8 @@ static int intel_queue_mmio_flip(struct drm_device *dev, > } > > spin_lock_irqsave(&dev_priv->mmio_flip_lock, irq_flags); > - intel_crtc->mmio_flip.seqno = i915_gem_request_get_seqno(obj->last_write_req); > + intel_crtc->mmio_flip.req = obj->last_write_req; > + i915_gem_request_reference(intel_crtc->mmio_flip.req); > intel_crtc->mmio_flip.ring_id = obj->ring->id; > spin_unlock_irqrestore(&dev_priv->mmio_flip_lock, irq_flags); > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index dd5e0f1..418ac13 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -395,7 +395,7 @@ struct intel_pipe_wm { > }; > > struct intel_mmio_flip { > - u32 seqno; > + struct drm_i915_gem_request *req; > u32 ring_id; > }; > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch