From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 3/4] drm/i915: Build workaround list in ring
 initialization
Date: Tue, 21 Oct 2014 14:52:55 +0200
Message-ID: <20141021125255.GG26941@phenom.ffwll.local>
References: <1412691687-12466-1-git-send-email-mika.kuoppala@intel.com>
 <1412691687-12466-3-git-send-email-mika.kuoppala@intel.com>
 <544534B9.4020801@linux.intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from mail-wg0-f46.google.com (mail-wg0-f46.google.com [74.125.82.46])
 by gabe.freedesktop.org (Postfix) with ESMTP id 3E2BA89DA4
 for <intel-gfx@lists.freedesktop.org>; Tue, 21 Oct 2014 05:52:48 -0700 (PDT)
Received: by mail-wg0-f46.google.com with SMTP id l18so1287247wgh.17
 for <intel-gfx@lists.freedesktop.org>; Tue, 21 Oct 2014 05:52:47 -0700 (PDT)
Content-Disposition: inline
In-Reply-To: <544534B9.4020801@linux.intel.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
To: "Siluvery, Arun" <arun.siluvery@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, miku@iki.fi
List-Id: intel-gfx@lists.freedesktop.org

On Mon, Oct 20, 2014 at 05:13:45PM +0100, Siluvery, Arun wrote:
> On 07/10/2014 15:21, Mika Kuoppala wrote:
> >If we build the workaround list in ring initialization
> >and decouple it from the actual writing of values, we
> >gain the ability to decide where and how we want to apply
> >the values.
> >
> >The advantage of this will become more clear when
> >we need to initialize workarounds on older gens where
> >it is not possible to write all the registers through ring
> >LRIs.
> >
> >v2: rebase on newest bdw workarounds
> >
> >Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
> >Cc: Damien Lespiau <damien.lespiau@intel.com>
> >Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> >---
> >  drivers/gpu/drm/i915/i915_debugfs.c     |  20 ++--
> >  drivers/gpu/drm/i915/i915_drv.h         |  28 ++---
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 185 ++++++++++++++++++--------------
> >  3 files changed, 130 insertions(+), 103 deletions(-)
> 
> Hi Daniel,
> 
> Patches 3, 4 in this series are independent of the first two.
> Could you please pull-in these patches?

Thanks for the pointer, both patches merged. I did frob the whitespace a
bit on patch 3 though to satisfy my ocd ;-)

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch