From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 11/16] drm/i915: disable/re-enable PCI device around S4 freeze/thaw Date: Tue, 21 Oct 2014 16:16:46 +0300 Message-ID: <20141021131646.GF4284@intel.com> References: <1410362229-814-1-git-send-email-imre.deak@intel.com> <1410362229-814-12-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 23D966E1FE for ; Tue, 21 Oct 2014 14:46:35 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1410362229-814-12-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Sep 10, 2014 at 06:17:04PM +0300, Imre Deak wrote: > We already disable everything during S4 freeze, except the PCI device > itself. There is no reason why we couldn't disable that too and doing > so allows us to unify these handlers in the next patch with the > corresponding S3 suspend/resume handlers. First I was a bit WTF because the PCI core doesn't seem to explicitly set the device back to D0 in .thaw() whereas it does for .restore()/.resume(). But then I realized pci_enable_device() does that anyway, so this looks fine. To properly optimize .freeze()/.thaw() we should basically just quiesce the device but leave everything powered on. But such optimizations are for the future, and in the meantime sharing the same codepaths should mean we have the same bugs for both, instead of slightly different bugs for each. Reviewed-by: Ville Syrj=E4l=E4 > = > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/i915_drv.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_= drv.c > index ea8dda7..0ff5e92 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -991,12 +991,11 @@ static int i915_pm_freeze_late(struct device *dev) > { > struct pci_dev *pdev =3D to_pci_dev(dev); > struct drm_device *drm_dev =3D pci_get_drvdata(pdev); > - struct drm_i915_private *dev_priv =3D drm_dev->dev_private; > = > if (drm_dev->switch_power_state =3D=3D DRM_SWITCH_POWER_OFF) > return 0; > = > - return intel_suspend_complete(dev_priv); > + return i915_drm_suspend_late(drm_dev); > } > = > static int i915_pm_thaw_early(struct device *dev) > @@ -1004,7 +1003,7 @@ static int i915_pm_thaw_early(struct device *dev) > struct pci_dev *pdev =3D to_pci_dev(dev); > struct drm_device *drm_dev =3D pci_get_drvdata(pdev); > = > - return i915_drm_thaw_early(drm_dev); > + return i915_resume_early(drm_dev); > } > = > static int i915_pm_thaw(struct device *dev) > -- = > 1.8.4 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC