From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/8] drm/i915: Convert shared dpll reference count to a crtc mask Date: Wed, 22 Oct 2014 11:13:31 +0300 Message-ID: <20141022081330.GU4284@intel.com> References: <1413896529-32443-1-git-send-email-ander.conselvan.de.oliveira@intel.com> <1413896529-32443-2-git-send-email-ander.conselvan.de.oliveira@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id B675E6E287 for ; Wed, 22 Oct 2014 01:16:19 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1413896529-32443-2-git-send-email-ander.conselvan.de.oliveira@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ander Conselvan de Oliveira Cc: intel-gfx@lists.freedesktop.org, shuang.he@linux.intel.com List-Id: intel-gfx@lists.freedesktop.org On Tue, Oct 21, 2014 at 04:02:02PM +0300, Ander Conselvan de Oliveira wrote: > This will be used in a follow up patch to properly release shared DPLLs > without relying on the shared_dpll field in pipe_config. > = > Signed-off-by: Ander Conselvan de Oliveira > --- > drivers/gpu/drm/i915/i915_debugfs.c | 4 +-- > drivers/gpu/drm/i915/i915_drv.h | 4 +-- > drivers/gpu/drm/i915/intel_display.c | 63 +++++++++++++++++++++++-------= ------ > 3 files changed, 44 insertions(+), 27 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i= 915_debugfs.c > index da4036d..71885d8 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2627,8 +2627,8 @@ static int i915_shared_dplls_info(struct seq_file *= m, void *unused) > struct intel_shared_dpll *pll =3D &dev_priv->shared_dplls[i]; > = > seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id); > - seq_printf(m, " refcount: %i, active: %i, on: %s\n", pll->refcount, > - pll->active, yesno(pll->on)); > + seq_printf(m, " crtc_mask: 0x%08x, active: %d, on: %s\n", > + pll->crtc_mask, pll->active, yesno(pll->on)); > seq_printf(m, " tracked hardware state:\n"); > seq_printf(m, " dpll: 0x%08x\n", pll->hw_state.dpll); > seq_printf(m, " dpll_md: 0x%08x\n", pll->hw_state.dpll_md); > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index 9f3d689..0db3e1c 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -227,8 +227,8 @@ struct intel_dpll_hw_state { > }; > = > struct intel_shared_dpll { > - int refcount; /* count of number of CRTCs sharing this PLL */ > - int active; /* count of number of active CRTCs (i.e. DPMS on) */ > + unsigned crtc_mask; /* mask of CRTCs sharing this PLL */ > + int active; /* count of number of active CRTCs (i.e. DPMS on) */ ^^ Spurious whitespace change. > bool on; /* is the PLL actually active? Disabled during modeset */ > const char *name; > /* should match the index in the dev_priv->shared_dplls array */ > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index 7d9beaa..51c7cf8 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1775,7 +1775,7 @@ static void intel_prepare_shared_dpll(struct intel_= crtc *crtc) > if (WARN_ON(pll =3D=3D NULL)) > return; > = > - WARN_ON(!pll->refcount); > + WARN_ON(!pll->crtc_mask); > if (pll->active =3D=3D 0) { > DRM_DEBUG_DRIVER("setting up %s\n", pll->name); > WARN_ON(pll->on); > @@ -1802,7 +1802,7 @@ static void intel_enable_shared_dpll(struct intel_c= rtc *crtc) > if (WARN_ON(pll =3D=3D NULL)) > return; > = > - if (WARN_ON(pll->refcount =3D=3D 0)) > + if (WARN_ON(pll->crtc_mask =3D=3D 0)) > return; > = > DRM_DEBUG_KMS("enable %s (active %d, on? %d) for crtc %d\n", > @@ -1834,7 +1834,7 @@ static void intel_disable_shared_dpll(struct intel_= crtc *crtc) > if (WARN_ON(pll =3D=3D NULL)) > return; > = > - if (WARN_ON(pll->refcount =3D=3D 0)) > + if (WARN_ON(pll->crtc_mask =3D=3D 0)) > return; > = > DRM_DEBUG_KMS("disable %s (active %d, on? %d) for crtc %d\n", > @@ -3834,12 +3834,13 @@ void intel_put_shared_dpll(struct intel_crtc *crt= c) > if (pll =3D=3D NULL) > return; > = > - if (pll->refcount =3D=3D 0) { > - WARN(1, "bad %s refcount\n", pll->name); > + if (!(pll->crtc_mask & (1 << crtc->pipe))) { > + WARN(1, "bad %s crtc mask\n", pll->name); > return; > } > = > - if (--pll->refcount =3D=3D 0) { > + pll->crtc_mask &=3D ~(1 << crtc->pipe); > + if (pll->crtc_mask =3D=3D 0) { > WARN_ON(pll->on); > WARN_ON(pll->active); > } > @@ -3867,7 +3868,7 @@ struct intel_shared_dpll *intel_get_shared_dpll(str= uct intel_crtc *crtc) > DRM_DEBUG_KMS("CRTC:%d using pre-allocated %s\n", > crtc->base.base.id, pll->name); > = > - WARN_ON(pll->refcount); > + WARN_ON(pll->crtc_mask); > = > goto found; > } > @@ -3876,14 +3877,15 @@ struct intel_shared_dpll *intel_get_shared_dpll(s= truct intel_crtc *crtc) > pll =3D &dev_priv->shared_dplls[i]; > = > /* Only want to check enabled timings first */ > - if (pll->refcount =3D=3D 0) > + if (pll->crtc_mask =3D=3D 0) > continue; > = > if (memcmp(&crtc->config.dpll_hw_state, &pll->hw_state, > sizeof(pll->hw_state)) =3D=3D 0) { > - DRM_DEBUG_KMS("CRTC:%d sharing existing %s (refcount %d, ative %d)\n", > - crtc->base.base.id, > - pll->name, pll->refcount, pll->active); > + DRM_DEBUG_KMS("CRTC:%d sharing existing %s " > + "(crtc_mask 0x%08x, active %d)\n", > + crtc->base.base.id, pll->name, > + pll->crtc_mask, pll->active); > = > goto found; > } > @@ -3892,7 +3894,7 @@ struct intel_shared_dpll *intel_get_shared_dpll(str= uct intel_crtc *crtc) > /* Ok no matching timings, maybe there's a free one? */ > for (i =3D 0; i < dev_priv->num_shared_dpll; i++) { > pll =3D &dev_priv->shared_dplls[i]; > - if (pll->refcount =3D=3D 0) { > + if (pll->crtc_mask =3D=3D 0) { > DRM_DEBUG_KMS("CRTC:%d allocated %s\n", > crtc->base.base.id, pll->name); > goto found; > @@ -3902,14 +3904,14 @@ struct intel_shared_dpll *intel_get_shared_dpll(s= truct intel_crtc *crtc) > return NULL; > = > found: > - if (pll->refcount =3D=3D 0) > + if (pll->crtc_mask =3D=3D 0) > pll->hw_state =3D crtc->config.dpll_hw_state; > = > crtc->config.shared_dpll =3D i; > DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name, > pipe_name(crtc->pipe)); > = > - pll->refcount++; > + pll->crtc_mask |=3D 1 << crtc->pipe; > = > return pll; > } > @@ -10809,6 +10811,19 @@ check_crtc_state(struct drm_device *dev) > } > } > = > +static int mask_to_refcount(unsigned mask) > +{ > + int refcount =3D 0; > + > + while (mask) { > + if (mask & 1) > + refcount++; > + mask >>=3D 1; > + } > + > + return refcount; > +} hweight32() > + > static void > check_shared_dpll_state(struct drm_device *dev) > { > @@ -10828,9 +10843,9 @@ check_shared_dpll_state(struct drm_device *dev) > = > active =3D pll->get_hw_state(dev_priv, pll, &dpll_hw_state); > = > - WARN(pll->active > pll->refcount, > + WARN(pll->active > mask_to_refcount(pll->crtc_mask), > "more active pll users than references: %i vs %i\n", > - pll->active, pll->refcount); > + pll->active, mask_to_refcount(pll->crtc_mask)); > WARN(pll->active && !pll->on, > "pll in active use but not on in sw tracking\n"); > WARN(pll->on && !pll->active, > @@ -10848,9 +10863,9 @@ check_shared_dpll_state(struct drm_device *dev) > WARN(pll->active !=3D active_crtcs, > "pll active crtcs mismatch (expected %i, found %i)\n", > pll->active, active_crtcs); > - WARN(pll->refcount !=3D enabled_crtcs, > + WARN(mask_to_refcount(pll->crtc_mask) !=3D enabled_crtcs, > "pll enabled crtcs mismatch (expected %i, found %i)\n", > - pll->refcount, enabled_crtcs); > + mask_to_refcount(pll->crtc_mask), enabled_crtcs); > = > WARN(pll->on && memcmp(&pll->hw_state, &dpll_hw_state, > sizeof(dpll_hw_state)), > @@ -13275,16 +13290,18 @@ static void intel_modeset_readout_hw_state(stru= ct drm_device *dev) > = > pll->on =3D pll->get_hw_state(dev_priv, pll, &pll->hw_state); > pll->active =3D 0; > + pll->crtc_mask =3D 0; > for_each_intel_crtc(dev, crtc) { > - if (crtc->active && intel_crtc_to_shared_dpll(crtc) =3D=3D pll) > + if (crtc->active && intel_crtc_to_shared_dpll(crtc) =3D=3D pll) { > pll->active++; > + pll->crtc_mask |=3D 1 << crtc->pipe; > + } > } > - pll->refcount =3D pll->active; > = > - DRM_DEBUG_KMS("%s hw state readout: refcount %i, on %i\n", > - pll->name, pll->refcount, pll->on); > + DRM_DEBUG_KMS("%s hw state readout: crtc_mask 0x%08x, on %i\n", > + pll->name, pll->crtc_mask, pll->on); > = > - if (pll->refcount) > + if (pll->crtc_mask) > intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS); > } > = > -- = > 1.9.1 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC