From: Daniel Vetter <daniel@ffwll.ch>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 2/2] drm/i915: only run hsw_power_well_post_enable when really needed
Date: Wed, 22 Oct 2014 20:34:13 +0200 [thread overview]
Message-ID: <20141022183413.GY26941@phenom.ffwll.local> (raw)
In-Reply-To: <20141007200054.GF32511@intel.com>
On Tue, Oct 07, 2014 at 11:00:54PM +0300, Ville Syrjälä wrote:
> On Tue, Oct 07, 2014 at 04:11:11PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > Only run it after we actually enable the power well. When we're
> > booting the machine there are cases where we run
> > hsw_power_well_post_enable without really needing, and even though
> > this is not causing any real bugs, it is unneeded and causes confusion
> > to people debugging interrupts.
> >
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Seems perfectly sensible.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-10-22 18:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-07 19:11 [PATCH 1/2] drm/i915: properly reenable gen8 pipe IRQs Paulo Zanoni
2014-10-07 19:11 ` [PATCH 2/2] drm/i915: only run hsw_power_well_post_enable when really needed Paulo Zanoni
2014-10-07 20:00 ` Ville Syrjälä
2014-10-22 18:34 ` Daniel Vetter [this message]
2014-10-07 19:58 ` [Intel-gfx] [PATCH 1/2] drm/i915: properly reenable gen8 pipe IRQs Ville Syrjälä
2014-10-07 20:36 ` Paulo Zanoni
2014-10-07 21:02 ` [PATCH] " Paulo Zanoni
2014-10-08 8:25 ` [Intel-gfx] " Jani Nikula
2014-10-08 18:36 ` Paulo Zanoni
2014-10-08 13:49 ` [Intel-gfx] " Jani Nikula
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