Re: [PATCH 2/2] drm/i915: run hsw_disable_pc8() later on resume

[Daniel Vetter <daniel@ffwll.ch>]

On Thu, Oct 23, 2014 at 08:56:44AM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> We want to run intel_uncore_early_sanitize() before we touch any
> registers, because on BDW, when we resume, the FPGA_DBG_RM_NOCLAIM bit
> is set, so we need to clear it - through intel_uncore_early_sanitize()
> - before we do anything else. With the current code, we don't clear
> the bit before our first register access, so we print a WARN
> complaining about an unclaimed register error.
> 
> v1: Was called "drm/i915: run intel_uncore_early_sanitize earlier on
> resume"
> v2: Was called "drm/i915: run intel_uncore_early_sanitize earlier on
> resume on non-VLV"
> v3: This one, on top of the intel_resume_prepare() rework.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83094
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Yeah, I think this looks better. I'll keep on being grumpy about vlv doing
all the register save/restore stuff it really shouldn't be doing though
;-) But that's definitely and entirely different thing.

Cheers, Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index c5b2662..ea7415a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -665,15 +665,16 @@ static int i915_drm_thaw_early(struct drm_device *dev)
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int ret = 0;
>  
> -	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> -		hsw_disable_pc8(dev_priv);
> -	else if (IS_VALLEYVIEW(dev_priv))
> +	if (IS_VALLEYVIEW(dev_priv))
>  		ret = vlv_resume_prepare(dev_priv, false);
>  	if (ret)
>  		DRM_ERROR("Resume prepare failed: %d,Continuing resume\n", ret);
>  
> -
>  	intel_uncore_early_sanitize(dev, true);
> +
> +	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> +		hsw_disable_pc8(dev_priv);
> +
>  	intel_uncore_sanitize(dev);
>  	intel_power_domains_init_hw(dev_priv);
>  
> -- 
> 2.1.1
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch