From mboxrd@z Thu Jan 1 00:00:00 1970 From: Damien Lespiau Subject: Re: [PATCH] drm/i915: Emit even number of dwords when emitting LRIs Date: Thu, 23 Oct 2014 13:42:38 +0100 Message-ID: <20141023124238.GC10367@strange.ger.corp.intel.com> References: <1414000792-16111-1-git-send-email-arun.siluvery@linux.intel.com> <20141023122102.GJ26941@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 669FF6E477 for ; Thu, 23 Oct 2014 05:42:41 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20141023122102.GJ26941@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org, Mika Kuoppala List-Id: intel-gfx@lists.freedesktop.org On Thu, Oct 23, 2014 at 02:21:02PM +0200, Daniel Vetter wrote: > On Wed, Oct 22, 2014 at 06:59:52PM +0100, Arun Siluvery wrote: > > The number of DWords should be even when doing ring emits as > > command sequences require QWord alignment. > > > > v2: user LRI variant that can write multiple regs in one go (Damien). > > We can simply insert one NOP at the end instead of one per register write. > > > > Cc: Mika Kuoppala > > Signed-off-by: Arun Siluvery > > --- > > drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++-- > > 1 file changed, 3 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > > index 497b836..a8f72e8 100644 > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > @@ -680,15 +680,16 @@ static int intel_ring_workarounds_emit(struct intel_engine_cs *ring) > > if (ret) > > return ret; > > > > - ret = intel_ring_begin(ring, w->count * 3); > > + ret = intel_ring_begin(ring, (w->count * 2 + 2)); > > if (ret) > > return ret; > > > > + intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(w->count)); > > Afaik there's a limit to the size of an MI_LRI. Where's the check for > that (probably with a WARN_ON for now to avoid unecessary complexity)? I guess there's always the size of the length field, I don't see any other indication. Note that I can find the documentation of the multi-registers version of LRI either. So, well, we probably should double check it does work. -- Damien