From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
Akash Goel <akash.goel@intel.com>
Subject: Re: [PATCH] drm/i915: Report the actual swizzling back to userspace
Date: Fri, 24 Oct 2014 16:39:29 +0200 [thread overview]
Message-ID: <20141024143929.GD26941@phenom.ffwll.local> (raw)
In-Reply-To: <1414149071-8636-1-git-send-email-chris@chris-wilson.co.uk>
On Fri, Oct 24, 2014 at 12:11:11PM +0100, Chris Wilson wrote:
> Userspace cares about whether or not swizzling depends on the page
> address for its direct access into bound objects. Extend the get_tiling
> ioctl to report the physical swizzling value in addition to the logical
> swizzling value so that userspace can accurately determine when it is
> possible for manual detiling.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Akash Goel <akash.goel@intel.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
I wonder whether we should care really, since on gen5+ we know that they
agree. Pimp some igt (by skipping if needed) to convince me?
-Daniel
> ---
> drivers/gpu/drm/i915/i915_gem_tiling.c | 1 +
> include/uapi/drm/i915_drm.h | 6 ++++++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
> index 3c073fb58730..b53ec941f17e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> @@ -446,6 +446,7 @@ i915_gem_get_tiling(struct drm_device *dev, void *data,
> }
>
> /* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */
> + args->phys_swizzle_mode = args->swizzle_mode;
> if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17)
> args->swizzle_mode = I915_BIT_6_SWIZZLE_9;
> if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17)
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 7615ae68e015..5ff86692e03e 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -934,6 +934,12 @@ struct drm_i915_gem_get_tiling {
> * mmap mapping.
> */
> __u32 swizzle_mode;
> +
> + /**
> + * Returned address bit 6 swizzling required for CPU access through
> + * mmap mapping whilst bound.
> + */
> + __u32 phys_swizzle_mode;
> };
>
> struct drm_i915_gem_get_aperture {
> --
> 2.1.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-10-24 14:39 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-24 11:11 [PATCH] drm/i915: Report the actual swizzling back to userspace Chris Wilson
2014-10-24 14:39 ` Daniel Vetter [this message]
2014-10-24 15:16 ` Chris Wilson
2014-10-27 9:08 ` Daniel Vetter
2014-10-30 10:40 ` Chris Wilson
2014-11-03 11:41 ` Daniel Vetter
2014-11-04 7:29 ` Chris Wilson
2014-11-04 9:40 ` Daniel Vetter
2014-11-04 7:35 ` [PATCH] igt/gem_tiled_wc: Exercise wc mmaps with swizzling Chris Wilson
2014-11-04 9:43 ` Daniel Vetter
2014-11-04 9:50 ` Chris Wilson
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