Re: [PATCH 2/3] drm/i915: Grab rpm ref when changing cdclk on VLV/CHV

From: Daniel Vetter <daniel@ffwll.ch>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/3] drm/i915: Grab rpm ref when changing cdclk on VLV/CHV
Date: Mon, 27 Oct 2014 09:48:27 +0100	[thread overview]
Message-ID: <20141027084827.GG26941@phenom.ffwll.local> (raw)
In-Reply-To: <1412692882-13577-2-git-send-email-ville.syrjala@linux.intel.com>

On Tue, Oct 07, 2014 at 05:41:21PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We need to access the gunit mailbox when changing the cdclk frequency.
> Currently we update the power wells only after chancing cdclk, so the
> device might be suspended when we have to frob it. Grab a runtime PM
> reference to make sure it's awake.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Late response because mailman.

> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d83a7f1..149310b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4812,10 +4812,12 @@ static void valleyview_modeset_global_resources(struct drm_device *dev)
>  	int req_cdclk = valleyview_calc_cdclk(dev_priv, max_pixclk);
>  
>  	if (req_cdclk != dev_priv->vlv_cdclk_freq) {
> +		intel_runtime_pm_get(dev_priv);
>  		if (IS_CHERRYVIEW(dev))
>  			cherryview_set_cdclk(dev, req_cdclk);
>  		else
>  			valleyview_set_cdclk(dev, req_cdclk);
> +		intel_runtime_pm_put(dev_priv);

So shouldn't we move the cdclock within modeset_update_crtc_power_domains?
That one first grabs new domains then drops old ones to make sure we don't
ever touch the hw in the off state.

Also vlv noob question: Does the cdclock setting survive a runtime suspend
transition, i.e. when we'd routine suspend right here between the cdclock
change and grabbing power wells (e.g. when turning everything on).
-Daniel

>  	}
>  
>  	modeset_update_crtc_power_domains(dev);
> -- 
> 2.0.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx