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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 07/14] drm/i915: Call gen5_gt_irq_reset() from valleyview_irq_uninstall()
Date: Fri, 31 Oct 2014 11:35:52 +0200	[thread overview]
Message-ID: <20141031093552.GA10649@intel.com> (raw)
In-Reply-To: <CA+gsUGQwDDFo1+hvVH-XTZvr59LRD_eTDx7n1cR9oPWq36M-gg@mail.gmail.com>

On Thu, Oct 30, 2014 at 05:51:49PM -0200, Paulo Zanoni wrote:
> 2014-10-30 15:42 GMT-02:00  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Looks like we forgot to call gen5_gt_irq_reset() for vlv in the
> > uninstall phase. Do so.
> 
> I also see that valleyview_irq_preinstall() contains 2 writes to GTIIR
> just before calling gen5_gt_irq_reset(), which should already clear
> GTIIR, and at the right order. On a quick look, none of your later
> patches seem to do that, so you could write patch 15/14 for that...

Yeah, I thought those were part of the "VLV magic" stuff, but apparently
they were just leftovers basically from these three commits:

 commit d18ea1b58a5003eb6fca03aff03c4c01321e6cb1
 Author: Daniel Vetter <daniel.vetter@ffwll.ch>
 Date:   Fri Jul 12 22:43:25 2013 +0200

    drm/i915: unify PM interrupt preinstall sequence

 commit 35079899e78315355d882658ae29bb94a2b6609b
 Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
 Date:   Tue Apr 1 15:37:15 2014 -0300

    drm/i915: add GEN5_IRQ_INIT

 commit 337ba0175f49b2d3a0bcc893f97f539bda831007
 Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
 Date:   Tue Apr 1 15:37:16 2014 -0300

    drm/i915: check if IIR is still zero at postinstall on Gen5+

So I'll whip up another patch to kill them.

I also want kill the "VLV magic" stuff as well, but I think I want to
test that kind of stuff a bit more since there's no explanation
whatsoever for the magic.

> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index c106bba..67c046b 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -3588,6 +3588,8 @@ static void valleyview_irq_uninstall(struct drm_device *dev)
> >
> >         I915_WRITE(VLV_MASTER_IER, 0);
> >
> > +       gen5_gt_irq_reset(dev);
> > +
> >         for_each_pipe(dev_priv, pipe)
> >                 I915_WRITE(PIPESTAT(pipe), 0xffff);
> >
> > --
> > 2.0.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2014-10-31  9:35 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-30 17:42 [PATCH 00/14] drm/i915: IRQ work for chv mostly ville.syrjala
2014-10-30 17:42 ` [PATCH 01/14] drm/i915: Apply some ocd for IMR vs. IER order during irq enable ville.syrjala
2014-10-30 18:37   ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 02/14] drm/i915: Use DPINVGTT_STATUS_MASK ville.syrjala
2014-10-30 18:41   ` Paulo Zanoni
2014-10-30 19:15     ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 03/14] drm/i915: Use gen8_gt_irq_reset() in cherryview_irq_uninstall() ville.syrjala
2014-10-30 18:49   ` Paulo Zanoni
2014-10-30 19:20     ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 04/14] drm/i915: Drop the extra GEN8_PCU_IIR posting read from cherryview_irq_preinstall() ville.syrjala
2014-10-30 18:51   ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 05/14] drm/i915: Use a consistent order between IIR, IER, IMR writes on vlv/chv ville.syrjala
2014-10-30 19:24   ` Paulo Zanoni
2014-10-30 19:39     ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 06/14] drm/i915: Use GEN5_IRQ_RESET() " ville.syrjala
2014-10-30 19:37   ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 07/14] drm/i915: Call gen5_gt_irq_reset() from valleyview_irq_uninstall() ville.syrjala
2014-10-30 19:51   ` Paulo Zanoni
2014-10-31  9:35     ` Ville Syrjälä [this message]
2014-10-31  9:48       ` Ville Syrjälä
2014-11-03 16:30         ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 08/14] drm/i915: Make valleyview_display_irqs_(un)install() work for chv ville.syrjala
2014-10-30 20:12   ` Paulo Zanoni
2014-10-31  9:40     ` Ville Syrjälä
2014-11-03 16:32       ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 09/14] drm/i915: Refactor vlv_display_irq_reset() ville.syrjala
2014-10-30 20:19   ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 10/14] drm/i915: Refactor vlv_display_irq_uninstall() ville.syrjala
2014-10-30 20:22   ` Paulo Zanoni
2014-10-30 20:37     ` Paulo Zanoni
2014-10-31  9:43       ` Ville Syrjälä
2014-10-30 17:43 ` [PATCH 11/14] drm/i914: Refactor vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:25   ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 12/14] drm/i915: Drop useless VLV_IIR writes from vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:28   ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 13/14] drm/i915: Use vlv display irq setup code for chv ville.syrjala
2014-10-30 20:41   ` Paulo Zanoni
2014-10-31 10:04     ` Ville Syrjälä
2014-11-14 17:38       ` Paulo Zanoni
2014-11-03 16:37     ` Daniel Vetter
2014-10-30 17:43 ` [PATCH 14/14] drm/i915: Reinit display irqs and hpd from chv pipe-a power well ville.syrjala
2014-11-14 17:49   ` Paulo Zanoni
2014-11-14 18:45     ` Ville Syrjälä
2014-11-17  8:17       ` Daniel Vetter
2014-10-31  9:53 ` [PATCH 15/14] drm/i915: Kill leftover GTIIR writes from valleyview_irq_preinstall() ville.syrjala
2014-11-03 16:38 ` [PATCH 00/14] drm/i915: IRQ work for chv mostly Daniel Vetter
2014-11-04 12:21   ` Ville Syrjälä
2014-11-04 12:40     ` Daniel Vetter
2014-11-04 16:42       ` Ville Syrjälä
2014-11-05  9:29         ` Daniel Vetter

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