From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 13/14] drm/i915: Use vlv display irq setup code for chv
Date: Fri, 31 Oct 2014 12:04:15 +0200 [thread overview]
Message-ID: <20141031100415.GE10649@intel.com> (raw)
In-Reply-To: <CA+gsUGRKW=mu3ZFC+6b3T9SETpSZRbOcEKer_2Q1TxB81eiDXQ@mail.gmail.com>
On Thu, Oct 30, 2014 at 06:41:11PM -0200, Paulo Zanoni wrote:
> 2014-10-30 15:43 GMT-02:00 <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Throw away the hand rolled display irq setup code on chv, and instead
> > just call vlv_display_irq_postinstall() and vlv_display_irq_uninstall().
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 37 ++-----------------------------------
> > 1 file changed, 2 insertions(+), 35 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 628a129..722f73c 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -3540,34 +3540,8 @@ static int gen8_irq_postinstall(struct drm_device *dev)
> > static int cherryview_irq_postinstall(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > - u32 enable_mask = I915_DISPLAY_PORT_INTERRUPT |
> > - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> > - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> > - I915_DISPLAY_PIPE_C_EVENT_INTERRUPT;
> > - u32 pipestat_enable = PLANE_FLIP_DONE_INT_STATUS_VLV |
> > - PIPE_CRC_DONE_INTERRUPT_STATUS;
> > - int pipe;
> > -
> > - /*
> > - * Leave vblank interrupts masked initially. enable/disable will
> > - * toggle them based on usage.
> > - */
> > - dev_priv->irq_mask = ~enable_mask;
> > -
> > - for_each_pipe(dev_priv, pipe)
> > - I915_WRITE(PIPESTAT(pipe), 0xffff);
> > -
> > - spin_lock_irq(&dev_priv->irq_lock);
> > - i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
> > - for_each_pipe(dev_priv, pipe)
> > - i915_enable_pipestat(dev_priv, pipe, pipestat_enable);
> > - spin_unlock_irq(&dev_priv->irq_lock);
> >
> > - I915_WRITE(VLV_IIR, 0xffffffff);
> > - I915_WRITE(VLV_IIR, 0xffffffff);
> > - I915_WRITE(VLV_IER, enable_mask);
> > - I915_WRITE(VLV_IMR, dev_priv->irq_mask);
> > - POSTING_READ(VLV_IMR);
> > + vlv_display_irq_postinstall(dev_priv);
>
> This chunk changes the order of stuff a little bit, but seems mostly
> equivalent. I'll consider it's ok.
>
> >
> > gen8_gt_irq_postinstall(dev_priv);
> >
> > @@ -3620,7 +3594,6 @@ static void valleyview_irq_uninstall(struct drm_device *dev)
> > static void cherryview_irq_uninstall(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > - int pipe;
> >
> > if (!dev_priv)
> > return;
> > @@ -3632,13 +3605,7 @@ static void cherryview_irq_uninstall(struct drm_device *dev)
> >
> > GEN5_IRQ_RESET(GEN8_PCU_);
> >
> > - I915_WRITE(PORT_HOTPLUG_EN, 0);
> > - I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
> > -
> > - for_each_pipe(dev_priv, pipe)
> > - I915_WRITE(PIPESTAT(pipe), 0xffff);
> > -
> > - GEN5_IRQ_RESET(VLV_);
> > + vlv_display_irq_uninstall(dev_priv);
>
> The perfect match for the code you removed seems to be
> vlv_display_irq_reset(). Why use vlv_display_irq_uninstall() instead?
Becasue vlv uses it too :) I suppose the idea is to disable the
interrupts the same way they got enabled for symmetry. So if the display
interrupts got enabled by valleyview_display_irqs_install() we should
uninstall them using valleyview_display_irqs_uninstall(). And also
irq_mask gets zeroed there to accurately reflect the state of the
VLV_IER/IMR registers. But yeah we could just call
vlv_display_irq_reset() and get the same hardware effect.
I'm actually thinking we should drop the .irq_preinstall() call from
intel_runtime_pm_enable_interrupts() since IIRC we don't even
unregister the irq handler itself there, and then add a bit of
irq_mask and whatnot sanity checking to .irq_postinstall().
>
> > }
> >
> > static void ironlake_irq_uninstall(struct drm_device *dev)
> > --
> > 2.0.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-10-31 10:04 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 17:42 [PATCH 00/14] drm/i915: IRQ work for chv mostly ville.syrjala
2014-10-30 17:42 ` [PATCH 01/14] drm/i915: Apply some ocd for IMR vs. IER order during irq enable ville.syrjala
2014-10-30 18:37 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 02/14] drm/i915: Use DPINVGTT_STATUS_MASK ville.syrjala
2014-10-30 18:41 ` Paulo Zanoni
2014-10-30 19:15 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 03/14] drm/i915: Use gen8_gt_irq_reset() in cherryview_irq_uninstall() ville.syrjala
2014-10-30 18:49 ` Paulo Zanoni
2014-10-30 19:20 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 04/14] drm/i915: Drop the extra GEN8_PCU_IIR posting read from cherryview_irq_preinstall() ville.syrjala
2014-10-30 18:51 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 05/14] drm/i915: Use a consistent order between IIR, IER, IMR writes on vlv/chv ville.syrjala
2014-10-30 19:24 ` Paulo Zanoni
2014-10-30 19:39 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 06/14] drm/i915: Use GEN5_IRQ_RESET() " ville.syrjala
2014-10-30 19:37 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 07/14] drm/i915: Call gen5_gt_irq_reset() from valleyview_irq_uninstall() ville.syrjala
2014-10-30 19:51 ` Paulo Zanoni
2014-10-31 9:35 ` Ville Syrjälä
2014-10-31 9:48 ` Ville Syrjälä
2014-11-03 16:30 ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 08/14] drm/i915: Make valleyview_display_irqs_(un)install() work for chv ville.syrjala
2014-10-30 20:12 ` Paulo Zanoni
2014-10-31 9:40 ` Ville Syrjälä
2014-11-03 16:32 ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 09/14] drm/i915: Refactor vlv_display_irq_reset() ville.syrjala
2014-10-30 20:19 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 10/14] drm/i915: Refactor vlv_display_irq_uninstall() ville.syrjala
2014-10-30 20:22 ` Paulo Zanoni
2014-10-30 20:37 ` Paulo Zanoni
2014-10-31 9:43 ` Ville Syrjälä
2014-10-30 17:43 ` [PATCH 11/14] drm/i914: Refactor vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:25 ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 12/14] drm/i915: Drop useless VLV_IIR writes from vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:28 ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 13/14] drm/i915: Use vlv display irq setup code for chv ville.syrjala
2014-10-30 20:41 ` Paulo Zanoni
2014-10-31 10:04 ` Ville Syrjälä [this message]
2014-11-14 17:38 ` Paulo Zanoni
2014-11-03 16:37 ` Daniel Vetter
2014-10-30 17:43 ` [PATCH 14/14] drm/i915: Reinit display irqs and hpd from chv pipe-a power well ville.syrjala
2014-11-14 17:49 ` Paulo Zanoni
2014-11-14 18:45 ` Ville Syrjälä
2014-11-17 8:17 ` Daniel Vetter
2014-10-31 9:53 ` [PATCH 15/14] drm/i915: Kill leftover GTIIR writes from valleyview_irq_preinstall() ville.syrjala
2014-11-03 16:38 ` [PATCH 00/14] drm/i915: IRQ work for chv mostly Daniel Vetter
2014-11-04 12:21 ` Ville Syrjälä
2014-11-04 12:40 ` Daniel Vetter
2014-11-04 16:42 ` Ville Syrjälä
2014-11-05 9:29 ` Daniel Vetter
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